Laux, 1984 - Google Patents
Accuracy of an effective channel length/external resistance extraction algorithm for MOSFET'sLaux, 1984
- Document ID
- 11351908998840290916
- Author
- Laux S
- Publication year
- Publication venue
- IEEE transactions on electron devices
External Links
Snippet
The accuracy of an effective channel length/external resistance extraction algorithm for MOSFET's is assessed. This is accomplished by exercising the algorithm with current- voltage data generated by two-dimensional numerical device simulation; the extracted …
- 238000000605 extraction 0 title abstract description 40
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
- G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Laux | Accuracy of an effective channel length/external resistance extraction algorithm for MOSFET's | |
Shur et al. | Unified MOSFET model | |
Chamberlain et al. | Drain-induced barrier-lowering analysis in VSLI MOSFET devices using two-dimensional numerical simulations | |
Sheu et al. | Source-and-drain series resistance of LDD MOSFET's | |
Rios et al. | An analytic polysilicon depletion effect model for MOSFETs | |
Lee et al. | Two-dimensional doping profile characterization of MOSFETs by inverse modeling using IV characteristics in the subthreshold region | |
Bucher et al. | Accurate MOS modelling for analog circuit simulation using the EKV model | |
KR100413214B1 (en) | Method for unique determination of fet equivalent circuit model parameters | |
Lallement et al. | Modelling and characterization of non-uniform substrate doping | |
Deen et al. | A new method for measuring the threshold voltage of small-geometry MOSFETs from subthreshold conduction | |
Chung et al. | An efficient semi-empirical model of the IV characteristics for LDD MOSFETS | |
US20050203719A1 (en) | Method for simulating reliability of semiconductor device | |
KR20020093961A (en) | Semi-physical modeling of hemt high frequency small signal equivalent circuit models | |
Cabon-Till et al. | Influence of source-drain series resistance on MOSFET field-effect mobility | |
Duvvury et al. | An analytical method for determining intrinsic drain/source resistance of lightly doped drain (LDD) devices | |
Selmi et al. | Parameter extraction from IV characteristics of single MOSFETs | |
Howes et al. | An SOS MOSFET model based on calculation of the surface potential | |
Osman et al. | An extended tanh law MOSFET model for high temperature circuit simulation | |
Hu et al. | An analytical model for the lateral channel electric field in LDD structures | |
Lee et al. | A new technique to extract channel mobility in submicron MOSFETs using inversion charge slope obtained from measured S-parameters | |
Chung | A complete model of the IV characteristics for narrow-gate MOSFETs | |
Victory et al. | A four-terminal compact model for high voltage diffused resistors with field plates | |
Victory et al. | A 4-terminal compact model for high voltage diffused resistors with field plates | |
Dubois et al. | Extraction method of the base series resistances in bipolar transistor in presence of current crowding | |
Jain | Generalized transconductance and transresistance methods for MOSFET characterization |