Nothing Special   »   [go: up one dir, main page]

Narasimhamurthy et al., 2021 - Google Patents

Fast architecture for low level vision and image enhancement for reconfigurable platform

Narasimhamurthy et al., 2021

Document ID
11162516804592005771
Author
Narasimhamurthy C
Kulkarni S
Publication year
Publication venue
2021 International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT)

External Links

Snippet

Image Processing architecture and algorithms are used for the purpose of improving the image quality and to extract complete information in more precise manner. The need to process in real time has led to implement them on the target device with real time constraints …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5045Circuit design
    • G06F17/5054Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K9/00Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
    • G06K9/36Image preprocessing, i.e. processing the image information without deciding about the identity of the image
    • G06K9/46Extraction of features or characteristics of the image
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K9/00Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
    • G06K9/62Methods or arrangements for recognition using electronic means
    • G06K9/6201Matching; Proximity measures
    • G06K9/6202Comparing pixel values or logical combinations thereof, or feature values having positional relevance, e.g. template matching
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/20Special algorithmic details
    • G06T2207/20112Image segmentation details
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T11/002D [Two Dimensional] image generation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration, e.g. from bit-mapped to bit-mapped creating a similar image
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring

Similar Documents

Publication Publication Date Title
Raut et al. FPGA implementation for image processing algorithms using xilinx system generator
US9384313B2 (en) Systems and methods for increasing debugging visibility of prototyping systems
Weberruss et al. ORB feature extraction and matching in hardware
Narasimhamurthy et al. Fast architecture for low level vision and image enhancement for reconfigurable platform
Babu et al. Hardware acceleration of image and video processing on Xilinx zynq platform
Chiuchisan et al. Image enhancement methods approach using verilog hardware description language
AZZAZ et al. FPGA HW/SW codesign approach for real-time image processing using HLS
Guragain et al. Implementation of FPGA based image processing algorithm using xilinx system generator
El Khoukhi et al. Comparative study between HDLs simulation and Matlab for image processing
Vaidya et al. Hardware acceleration of image processing algorithms using Vivado high level synthesis tool
Saidani et al. Hardware acceleration of video edge detection with hight level synthesis on the Xilinx Zynq platform
Vasicek et al. Evolutionary functional approximation of circuits implemented into FPGAs
Chiuchisan Implementation of medical image processing algorithm on reconfigurable hardware
Acharya et al. FPGA Based Non Uniform Illumination Correction in Image Processing Application 2
Boudabous et al. HW/SW design and FPGA implementation of The GCM for an efficient text extraction from complex images
Alhomoud et al. Model-based Design of a High-Throughput Canny Edge Detection Accelerator on Zynq-7000 FPGA
Bharadwaj et al. Optimized FPGA implementation and synthesis of image segmentation techniques
Wei et al. Fpga design of real-time mdfd system using high level synthesis
Khaki et al. A Resource-Efficient Multi-Function Embedded Eye Tracker System Implemented on FPGA
Malik HARDWARE ACCELERATION OF CANNY EDGE DETECTION ON FPGA USING HIGH LEVEL SYNTHESIS
Lian et al. Optimization and FPGA Implementation of RANSAC Algorithm Based on HLS
Muller A new programmable VLSI architecture for histogram and statistics computation in different windows
Hamdaoui et al. Extraction of image features based on the HOG method in the HSV color space
Harahap et al. Implementation of integral image using ASIC design method with 0.35 μm CMOS technology
Fayçal et al. ISODATA SOPC-FPGA implementation of image segmentation using NIOS-II processor