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Smith et al., 2000 - Google Patents

Vector instruction set support for conditional operations

Smith et al., 2000

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Document ID
10031258148371605516
Author
Smith J
Faanes G
Sugumar R
Publication year
Publication venue
ACM SIGARCH Computer Architecture News

External Links

Snippet

Vector instruction sets are receiving renewed interest because of their applicability to multimedia. Current multimedia instruction sets use short vectors with SIMD implementations, but long vector, pipelined implementations have a number of advantages …
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