Nothing Special   »   [go: up one dir, main page]

Kamath et al., 2012 - Google Patents

A wide output range, mismatch tolerant Sigma Delta DAC for digital PLL in 90nm CMOS

Kamath et al., 2012

Document ID
994566366514115513
Author
Kamath A
Chattopadhyay B
Publication year
Publication venue
2012 IEEE International Symposium on Circuits and Systems (ISCAS)

External Links

Snippet

A mismatch-tolerant current-mode Sigma Delta (ΣΔ) Digital to Analog Converter (DAC) is presented here. The current mode DAC is designed such that the outputs of any two adjacent current elements can be progressively brought out for separate ΣΔ operation. This …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • H03M1/0656—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain
    • H03M1/066—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain by continuously permuting the elements used, i.e. dynamic element matching
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
    • H03M1/682—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits both converters being of the unary decoded type
    • H03M1/685—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits both converters being of the unary decoded type the quantisation value generators of both converters being arranged in a common two-dimensional array
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/80—Simultaneous conversion using weighted impedances
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/662—Multiplexed conversion systems
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10—Calibration or testing
    • H03M1/1009—Calibration
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information or similar information or a subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information or similar information or a subset of information is represented by a different sequence or number of digits
    • H03M7/14—Conversion to or from non-weighted codes
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS

Similar Documents

Publication Publication Date Title
Kratyuk et al. A digital PLL with a stochastic time-to-digital converter
KR101109198B1 (en) All-digital clock data recovery device and transceiver implemented thereof
US8553827B2 (en) ADC-based mixed-mode digital phase-locked loop
US8907708B2 (en) Digitally controlled oscillator with thermometer sigma delta encoded frequency control word
US6424283B2 (en) Segmented high speed and high resolution digital-to-analog converter
CN106341134B (en) Digital-to-analog converter with local interleaving and resampling
US8847806B2 (en) Digital to analog converter comprising mixer
US7688236B2 (en) Integrated circuit comprising a plurality of digital-to-analog converters, sigma-delta modulator circuit, and method of calibrating a plurality of multibit digital-to-analog converters
TWI387207B (en) Mixed-mode pll and method for reducing fractional spur of an adpll
US9762252B2 (en) Digitally controlled oscillator
US20120068865A1 (en) Fast data weighted average circuit and method
EP3703261A1 (en) Current controlled mdac for time-interleaved adcs and related methods
US7719369B2 (en) Sigma delta digital to analog converter with wide output range and improved linearity
Ghaedrahmati et al. A 38.6-fJ/conv.-step inverter-based continuous-time bandpass ΔΣ ADC in 28 nm using asynchronous SAR quantizer
Kamath et al. A wide output range, mismatch tolerant Sigma Delta DAC for digital PLL in 90nm CMOS
Li et al. A survey of high-speed high-resolution current steering DACs
WO2011002944A1 (en) Adc-based mixed-mode digital phase-locked loop
US20050093729A1 (en) Guaranteed monotonic digital to analog converter
EP3703262A1 (en) Mdac based time-interleaved analog-to-digital converters and related methods
EP3703260A2 (en) Digital calibration systems and methods for multi-stage analog-to-digital converters
Chang et al. A 5 GHz Fractional-$ N $ ADC-Based Digital Phase-Locked Loops With− 243.8 dB FOM
El-Halwagy et al. A programmable 8-bit, 10MHz BW, 6.8 mW, 200MSample/sec, 70dB SNDR VCO-based ADC using SC feedback for VCO linearization
Balasubramanian et al. Architectural trends in current-steering digital-to-analog converters
Zhao et al. A− 89-dBc IMD3 DAC sub-system in a 465-MHz BW CT delta-sigma ADC using a power and area efficient calibration technique
US7786914B2 (en) Time-interleaved delta-sigma modulator