Gregor, 1979 - Google Patents

Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/10—Programme control for peripheral devices
  • G06F13/12—Programme control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
  • G06F13/124—Programme control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
  • G06F13/126—Programme control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F9/00—Arrangements for programme control, e.g. control unit
  • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
  • G06F9/46—Multiprogramming arrangements
  • G06F9/54—Interprogramme communication; Intertask communication
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/14—Handling requests for interconnection or transfer
  • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
  • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F11/00—Error detection; Error correction; Monitoring
  • G06F11/07—Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
  • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
  • G06F11/0751—Error or fault detection not based on redundancy
  • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/38—Information transfer, e.g. on bus
  • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/38—Information transfer, e.g. on bus
  • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/28—Data switching networks characterised by path configuration, e.g. local area networks [LAN], wide area networks [WAN]
  • H04L12/40—Bus networks
  • H04L12/407—Bus networks with decentralised control
  • H04L12/413—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection (CSMA-CD)
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F15/00—Digital computers in general; Data processing equipment in general
  • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L69/00—Application independent communication protocol aspects or techniques in packet data networks
  • H04L69/26—Special purpose or proprietary protocols or architectures
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L29/00—Arrangements, apparatus, circuits or systems, not covered by a single one of groups H04L1/00 - H04L27/00 contains provisionally no documents
  • H04L29/02—Communication control; Communication processing contains provisionally no documents
  • H04L29/06—Communication control; Communication processing contains provisionally no documents characterised by a protocol

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