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Fezzardi et al., 2015 - Google Patents

Trace-based automated logical debugging for high-level synthesis generated circuits

Fezzardi et al., 2015

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Document ID
8314294686377794880
Author
Fezzardi P
Castellana M
Ferrandi F
Publication year
Publication venue
2015 33rd IEEE International Conference on Computer Design (ICCD)

External Links

Snippet

In this paper we present an approach for debugging hardware designs generated by High- Level Synthesis (HLS), relieving users from the burden of identifying the signals to trace and from the error-prone task of manually checking the traces. The necessary steps are …
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Classifications

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    • G06F11/3636—Software debugging by tracing the execution of the program
    • G—PHYSICS
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