Tanzawa et al., 2002 - Google Patents
High-voltage transistor scaling circuit techniques for high-density negative-gate channel-erasing NOR flash memoriesTanzawa et al., 2002
- Document ID
- 5441466373444205090
- Author
- Tanzawa T
- Takano Y
- Watanabe K
- Atsumi S
- Publication year
- Publication venue
- IEEE Journal of Solid-State Circuits
External Links
Snippet
In order to scale high-voltage transistors for high-density negative-gate channel-erasing NOR flash memories, two circuit techniques were developed. A proposed level shifter with low operating voltage is composed of three parts, a latch holding the negative erasing …
- 230000015654 memory 0 title abstract description 47
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
- H01L27/112—Read-only memory structures [ROM] and multistep manufacturing processes therefor
- H01L27/115—Electrically programmable read-only memories; Multistep manufacturing processes therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by G11C11/00
- G11C5/14—Power supply arrangements, e.g. Power down/chip (de)selection, layout of wiring/power grids, multiple supply levels
- G11C5/145—Applications of charge pumps ; Boosted voltage circuits ; Clamp circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6911075B2 (en) | Split gate flash memory system with complementary voltage sources | |
US6373749B1 (en) | Channel-erase nonvolatile semiconductor memory device | |
Cho et al. | A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes | |
US5513146A (en) | Nonvolatile semiconductor memory device having a row decoder supplying a negative potential to word lines during erase mode | |
US8085598B2 (en) | Nonvolatile semiconductor memory device | |
US7505355B2 (en) | Semiconductor memory device with MOS transistors each having floating gate and control gate | |
US6560144B2 (en) | Nonvolatile semiconductor memory device | |
US6747897B2 (en) | Semiconductor charge pump circuit and nonvolatile semiconductor memory device | |
US6614699B2 (en) | Booster circuit for raising voltage by sequentially transferring charges from input terminals of booster units to output terminals thereof in response to clock signals having different phases | |
Tanzawa et al. | High-voltage transistor scaling circuit techniques for high-density negative-gate channel-erasing NOR flash memories | |
US6477092B2 (en) | Level shifter of nonvolatile semiconductor memory | |
JPH11120779A (en) | Non-volatile semiconductor memory | |
US6665229B2 (en) | Semiconductor memory device row decoder structures having reduced layout area, and methods of operating the same | |
JP2006196061A (en) | Voltage switch circuit, and semiconductor memory device using the same | |
US7180789B2 (en) | Semiconductor memory device with MOS transistors, each having a floating gate and a control gate, and memory card including the same | |
US7190623B2 (en) | Non-volatile memory cell and method of operating the same | |
Takeuchi et al. | A source-line programming scheme for low-voltage operation NAND flash memories | |
US10978154B2 (en) | Semiconductor device | |
US20050047213A1 (en) | Nonvolatile semiconductor memory device with MOS transistors each having a floating gate and a control gate | |
JP2000174600A (en) | Negative voltage level shifter circuit and nonvolatile semiconductor storage device | |
US10763834B2 (en) | Latch circuit | |
Gupta et al. | A 5V-only 16K EEPROM utilizing oxynitride dielectrics and EPROM redundancy | |
US6803800B2 (en) | Negative voltage switch and related flash memory for transferring negative voltage with triple-well transistors | |
Motta et al. | High-voltage management in single-supply CHE NOR-type flash memories | |
JPH07130888A (en) | Nonvolatile semiconductor storage device |