Yang et al., 2020 - Google Patents
Meshed stack via design considering complicated design rules with automatic constraint generationYang et al., 2020
- Document ID
- 4838807395558203680
- Author
- Yang K
- Yu T
- Fang S
- Cheng T
- Liu Y
- Shen C
- Publication year
- Publication venue
- Proceedings of the 39th International Conference on Computer-Aided Design
External Links
Snippet
In advanced semiconductor processes, the dramatic shrink of layout features has made a significant impact on circuit delay and electromigration (EM). Recently, meshed stack vias (MSVs) have been proposed as a solution to improve circuit timing and signal integrity, each …
- 239000002184 metal 0 abstract description 65
Classifications
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- G06F17/50—Computer-aided design
- G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
- G06F17/5077—Routing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
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- G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
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