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IBM Research

Hardware Verification Technologies

An on-line algorithm for checkpoint placement
A probabilistic analysis of coverage methods
Analysis of checkpointing schemes for multiprocessor systems
Efficient checkpointing over local area networks
Piparazzi: A Test Program Generator for Micro-architecture Flow Verification
Test generation for the binary floating point add operation with mask-mask-mask constraints
The mathematical problem discussed is important for generating test cases in order to debug floating point adders designs. Floating point numbers are assumed to be written as strings of {0, 1} bits, in a format compatible with IEEE... more
Using a constraint satisfaction formulation and solution techniques for random test program generation
Genesys-pro: innovations in test program generation for functional processor verification
Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation
Advanced Analysis Techniques for Cross-Product Coverage
Performance optimization of checkpointing schemes with task duplication
Analysis of checkpointing schemes with task duplication
Automatic boosting of cross-product coverage using Bayesian networks
Enhancing the control and efficiency of the covering process [logic verification]
A probabilistic alternative to regression suites
Scheduling-based test-case generation for verification of multimedia SoCs
Placement and routing for a field programmable multi-chip module
Bridging pre-silicon verification and post-silicon validation
User defined coverage---a tool supported methodology for design verification
Enhancing the efficiency of Bayesian network based coverage directed test generation