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1. SYMPL64_FloatingPo 6F12 int_RISC- SYMPL64_FloatingPoint_RISC- Public

   SYMPLYON 64-bit GP-GPU Compute Unit ISA and synthesizable Verilog RTL model for IEEE754-2008 Compute applications. This is a single floating-point compute unit with four, interleaving threads. It …

   Verilog 7 1

2. OFDM_Synchronization OFDM_Synchronization Public

   Forked from NeilJudson/OFDM_Synchronization

   Design a new OFDM synchronization algorithm, and implement it with both Matlab and Verilog.

   VHDL 2 1

3. openlte openlte Public

   Forked from zyh329/openlte

   Clone of http://sourceforge.net/projects/openlte/

   C++ 1

4. riscv riscv Public

   Forked from openhwgroup/cv32e40p

   SystemVerilog 1

5. core2axi core2axi Public

   Forked from pulp-platform/core2axi

   Core protocol to AXI bridge

   SystemVerilog 1

6. apb_timer apb_timer Public

   Forked from pulp-platform/apb_timer

   SystemVerilog 1