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1. pulp-platform/redundancy_cells pulp-platform/redundancy_cells Public

   SystemVerilog IPs and Modules for architectural redundancy designs.

   SystemVerilog 14 9

2. pulp-platform/bender pulp-platform/bender Public

   A dependency management tool for hardware projects.

   Rust 328 53

3. pulp-platform/pulp pulp-platform/pulp Public

   This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

   SystemVerilog 516 123

4. pulp-platform/axi pulp-platform/axi Public

   AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

   SystemVerilog 1.4k 314

5. pulp-platform/iDMA pulp-platform/iDMA Public

   A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)

   SystemVerilog 184 39

6. pulp-platform/FlooNoC pulp-platform/FlooNoC Public

   A Fast, Low-Overhead On-chip Network

   SystemVerilog 231 44