The surge in world-wide energy consumption places a growing need for highly efficient power electronics for generation, transportation, and utilization of electricity. With the advent of new markets such as electric vehicles, PV solar inverters, the market for these power electronics components is predicted to reach $15 billion by 2020. Silicon-based devices are most commonly used in traditional power electronics applications, however, wide bandgap semiconductors such as gallium nitride (GaN) are more efficient and thus, useful for future energy applications.

Consequently, Gallium Nitride (GaN) based power devices have gained increased attention in recent years. For 600 V class power devices, lateral GaN high electron mobility transistors are available today. However, it is generally considered that for high voltage/high current applications (>900V/100 A), vertical device structures might be more suitable owing to their capability of achieving lower specific on-resistance and high breakdown voltage simultaneously.

Amongst numerous vertical device structures, the trench MOSFET is an attractive device structure to reduce on-resistance due to the capability of high cell density and the absence of a JFET region. However, high channel resistance in trench MOSFETs due to poor electron mobility in the channel creates reliability issues as a higher gate bias needs to be applied to reduce the channel resistance.

In this dissertation work, we developed a novel device design (called OG-FET) to enhance the channel mobility and therefore, lower the channel-resistance for the trench MOSFET structure while maintaining normally-off operation and same breakdown voltage. In OG-FET, a GaN interlayer is regrown followed by in-situ dielectric deposition via MOCVD on the n-p-n trenched structure to enhance the channel mobility. In addition, the in-situ gate-dielectric growth onto the GaN interlayer allows this device to achieve lower interface trap density compared to devices with ex-situ dielectrics deposited onto the trenched structure.

This thesis discusses the OG-FET device design, growth and fabrication process alongside device results and analysis. With sustained efforts, OG-FETs with high DC performance were achieved. The OG-FETs demonstrated threshold voltage between 1-4 V, breakdown voltage beyond 1 kV with a low on-resistance between 1.5-3 mΩ.cm2. The on-resistance values were achieved at a relatively low gate bias (~12 V-15 V) and low gate-dielectric field (~2-3 MV/cm) compared to conventional GaN trench MOSFETs.

These results are promising for the future application of OG-FETs for high voltage and high-power electronics.