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- research-articleJanuary 2024
Programmable Analog System Benchmarks Leading to Efficient Analog Computation Synthesis
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 17, Issue 1Article No.: 12, Pages 1–25https://doi.org/10.1145/3625298This effort develops the first rich suite of analog and mixed-signal benchmark of various sizes and domains, intended for use with contemporary analog and mixed-signal designs and synthesis tools. Benchmarking enables analog-digital co-design exploration ...
- research-articleJanuary 2024
Reprogrammable Non-Linear Circuits Using ReRAM for NN Accelerators
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 17, Issue 1Article No.: 7, Pages 1–19https://doi.org/10.1145/3617894As the massive usage of artificial intelligence techniques spreads in the economy, researchers are exploring new techniques to reduce the energy consumption of Neural Network (NN) applications, especially as the complexity of NNs continues to increase. ...
- research-articleOctober 2023
Constraint-Aware Multi-Technique Approximate High-Level Synthesis for FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 16, Issue 4Article No.: 61, Pages 1–28https://doi.org/10.1145/3624481Numerous approximate computing (AC) techniques have been developed to reduce the design costs in error-resilient application domains, such as signal and multimedia processing, data mining, machine learning, and computer vision, to trade-off computation ...
- research-articleJune 2023
NeuroHSMD: Neuromorphic Hybrid Spiking Motion Detector
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 16, Issue 3Article No.: 36, Pages 1–23https://doi.org/10.1145/3588318Vertebrate retinas are highly-efficient in processing trivial visual tasks such as detecting moving objects, which still represent complex challenges for modern computers. In vertebrates, the detection of object motion is performed by specialised retinal ...
- research-articleMay 2023
QiCells: A Modular RFSoC-based Approach to Interface Superconducting Quantum Bits
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 16, Issue 2Article No.: 32, Pages 1–23https://doi.org/10.1145/3571820Quantum computers will be a revolutionary extension of the heterogeneous computing world. They consist of many quantum bits (qubits) and require a careful design of the interface between the classical computer architecture and the quantum processor. For ...
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- research-articleDecember 2022
Data and Computation Reuse in CNNs Using Memristor TCAMs
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 16, Issue 1Article No.: 14, Pages 1–24https://doi.org/10.1145/3549536Exploiting computational and data reuse in CNNs is crucial for the successful design of resource-constrained platforms. In image recognition applications, high levels of input locality and redundancy present in CNNs have become the golden goose for ...
- research-articleDecember 2022
- research-articleJanuary 2022
NASCENT2: Generic Near-Storage Sort Accelerator for Data Analytics on SmartSSD
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 15, Issue 2Article No.: 16, Pages 1–29https://doi.org/10.1145/3472769As the size of data generated every day grows dramatically, the computational bottleneck of computer systems has shifted toward storage devices. The interface between the storage and the computational platforms has become the main limitation due to its ...
- research-articleDecember 2021
The Impact of Terrestrial Radiation on FPGAs in Data Centers
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 15, Issue 2Article No.: 12, Pages 1–21https://doi.org/10.1145/3457198Field programmable gate arrays (FPGAs) are used in large numbers in data centers around the world. They are used for cloud computing and computer networking. The most common type of FPGA used in data centers are re-programmable SRAM-based FPGAs. These ...
- research-articleSeptember 2020
MEG: A RISCV-based System Emulation Infrastructure for Near-data Processing Using FPGAs and High-bandwidth Memory
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 13, Issue 4Article No.: 19, Pages 1–24https://doi.org/10.1145/3409114Emerging three-dimensional (3D) memory technologies, such as the Hybrid Memory Cube (HMC) and High Bandwidth Memory (HBM), provide high-bandwidth and massive memory-level parallelism. With the growing heterogeneity and complexity of computer systems (...
- research-articleNovember 2019
The FPOA, a Medium-grained Reconfigurable Architecture for High-level Synthesis
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 12, Issue 4Article No.: 18, Pages 1–31https://doi.org/10.1145/3340556In this article, we present a novel type of medium-grained reconfigurable architecture that we term the Field Programmable Operation Array (FPOA). This device has been designed specifically for the implementation of HLS-generated circuitry. At the core ...
- research-articleMay 2019
A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 12, Issue 2Article No.: 10, Pages 1–21https://doi.org/10.1145/3322482Time-to-digital converters (TDCs) are widely used in applications that require the measurement of the time interval between events. In previous designs using a feedback loop and an extended delay line, process-voltage-temperature (PVT) variation often ...
- research-articleJuly 2018
Preemption of the Partial Reconfiguration Process to Enable Real-Time Computing With FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 11, Issue 2Article No.: 10, Pages 1–24https://doi.org/10.1145/3182183To improve computing performance in real-time applications, modern embedded platforms comprise hardware accelerators that speed up the task’s most compute-intensive parts. A recent trend in the design of real-time embedded systems is to integrate field-...
- research-articleSeptember 2016
Analysis of Fixed, Reconfigurable, and Hybrid Devices with Computational, Memory, I/O, & Realizable-Utilization Metrics
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 10, Issue 1Article No.: 2, Pages 1–21https://doi.org/10.1145/2888401The modern processor landscape is a varied and diverse community. As such, developers need a way to quickly and fairly compare various devices for use with particular applications. This article expands the authors’ previously published computational-...
- research-articleDecember 2015
CORDIC-Based Enhanced Systolic Array Architecture for QR Decomposition
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 9, Issue 2Article No.: 9, Pages 1–22https://doi.org/10.1145/2827700Multiple input multiple output (MIMO) with orthogonal frequency division multiplexing (OFDM) systems typically use orthogonal-triangular (QR) decomposition. In this article, we present an enhanced systolic array architecture to realize QR decomposition ...
- research-articleDecember 2015
Value State Flow Graph: A Dataflow Compiler IR for Accelerating Control-Intensive Code in Spatial Hardware
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 9, Issue 2Article No.: 14, Pages 1–22https://doi.org/10.1145/2807702Although custom (and reconfigurable) computing can provide orders-of-magnitude improvements in energy efficiency and performance for many numeric, data-parallel applications, performance on nonnumeric, sequential code is often worse than conventional ...
- research-articleNovember 2015
An Enhanced Adaptive Recoding Rotation CORDIC
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 9, Issue 1Article No.: 4, Pages 1–25https://doi.org/10.1145/2812813The Conventional Coordinate Rotation Digital Computer (CORDIC) algorithm has been widely used in many applications, particularly in Direct Digital Frequency Synthesizers (DDS) and Fast Fourier Transforms (FFT). However, CORDIC is constrained by the ...
- research-articleDecember 2014
High-Speed Hardware Partition Generation
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 7, Issue 4Article No.: 28, Pages 1–17https://doi.org/10.1145/2629472We demonstrate circuits that generate set and integer partitions on a set S of n objects at a rate of one per clock. Partitions are ways to group elements of a set together and have been extensively studied by researchers in algorithm design and theory. ...
- research-articleDecember 2014
Secure, Remote, Dynamic Reconfiguration of FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 7, Issue 4Article No.: 35, Pages 1–19https://doi.org/10.1145/2629423With the widespread availability of broadband Internet, Field-Programmable Gate Arrays (FPGAs) can get remote updates in the field. This provides hardware and software updates, and enables issue solving and upgrade ability without device modification. ...
- research-articleSeptember 2014
Networks-on-Chip for FPGAs: Hard, Soft or Mixed?
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 7, Issue 3Article No.: 20, Pages 1–22https://doi.org/10.1145/2629442As FPGA capacity increases, a growing challenge is connecting ever-more components with the current low-level FPGA interconnect while keeping designers productive and on-chip communication efficient. We propose augmenting FPGAs with networks-on-chip (...