This paper discusses the concepts and philosophy underlying a layout digitizing and mask pen plotting system developed by Rockwell International for custom microelectronic devices. It is a system composed of high reliability components requiring minimal ...

State of the art system designs require larger, more densely populated, thermally stable, multilayer hybrid substrates. Increased logic densities dictate the need for narrower conductor line widths and better screening techniques. Increasing material ...

This paper discusses the evolution of a unique setup for design of integrated circuit masks, using interactive graphics equipment in an open shop environment. The evolution of this design philosophy is traced from manual drafting and digitizing, through ...

This paper describes a new design rule checking system for LSI mask patterns. Major features of the system are a relatively small computing time needed, even for very large circuits (e.g. 10,000 elements), wide applications to a variety of fabrication ...

This paper presents a placement technique for allocation of logic gates to locations. The placement technique involves four different procedures, namely, constructive placement, linear assignment of signal I/Os, pairwise interchange, and wirability ...

A discussion of the design decisions made in the development of a new computer-aided Printer Circuit Board design and documentation system, and a description of completing a PCB on the resulting system. The system is a maximum capability tool, uses high ...

DOCIL is a system that have been designed in order to produce the layout of a two side PCB from the data the human designer usually deals with. Two conditions that have been set for the system. First it is portability and second a small system ...

This paper presents a PCB layout system developed within Bell-Northern Research. The system is implemented on a PDP-11/70 minicomputer and it has been in production use since July 1976. The system consists of several modules for carrying out various ...

An experimental system of programs is described which places logic gates on a chip, globally wires the gates and then optimizes the power required to drive them. Further power reductions are realized by using power-oriented placement improvement ...

Traditionally, automatic IC layout programs have been constrained to produced designs in which cells are placed in rows.

The resulting chips are typically too large, compared to manual layout, to be used for high-volume production. FLOSS uses a new ...

Sandia Laboratories is responsible for the design of a variety of printed wiring boards (PWB's) which often have severe size and shape constraints as well as extremely high reliability specifications. This sometimes necessitates meticulous component ...

A stochastic model is developed for estimating wiring space requirements for one-dimensional layouts. This model uses as input the number of devices in the complex to be wired, the average length of a connection, and the average number of connections ...

In this paper we describe a router which has the capabilities of automatic rip-up and rerouting. The system employs a “look-ahead” feature for determining if as yet unrouted nets are unroutable. Backtrack programming is used to implement an implicit ...

This paper describes an effective implementation of a rectangle probe interconnection routing algorithm. The router successfully handles multilayer boards with foil conducting paths of various widths. Connections defined by the router may utilize one or ...

The requirement for high density packaging is dominant in the design of electronic systems. In the assembly of such systems multi-layer printed wiring boards are often used to provide the necessary connections among functional modules, and as the wiring ...