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- research-articleJuly 2009
NoC topology synthesis for supporting shutdown of voltage islands in SoCs
DAC '09: Proceedings of the 46th Annual Design Automation ConferencePages 822–825https://doi.org/10.1145/1629911.1630121In many Systems on Chips (SoCs), the cores are clustered in to voltage islands. When cores in an island are unused, the entire island can be shutdown to reduce the leakage power consumption. However, today, the interconnect architecture is a bottleneck ...
- research-articleJuly 2009
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips
- Shu-Hsuan Chou,
- Chien-Chih Chen,
- Chi-Neng Wen,
- Yi-Chao Chan,
- Tien-Fu Chen,
- Chao-Ching Wang,
- Jinn-Shyan Wang
DAC '09: Proceedings of the 46th Annual Design Automation ConferencePages 587–592https://doi.org/10.1145/1629911.1630062Consistent with the trend towards the use of many cores in SOC and 3D Chip techniques, this paper proposes a "single-cycle ring" interconnection (SC_Ring) with ultra-low latency and minimal complexity. The proposed SC_Ring allows multiple single-cycle ...