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- articleNovember 2015
A novel technique exploiting C-V, G-V and I-V simulations to investigate defect distribution and native oxide in high-κ dielectrics for III-V MOSFETs
Microelectronic Engineering (MCEE), Volume 147, Issue CPages 281–284https://doi.org/10.1016/j.mee.2015.04.111Display Omitted A defect spectroscopy technique is developed to investigate high- dielectrics.The method exploit simultaneous simulations of I-V and multi-frequency C-V and G-V.Sensitivity curves for IV, CV and GV are used to determine the defect ...
- articleJuly 2011
Soft breakdown in irradiated high-κ nanolaminates
Microelectronic Engineering (MCEE), Volume 88, Issue 7Pages 1425–1427https://doi.org/10.1016/j.mee.2011.03.160In this paper the electrical characteristics of different atomic layer deposited (ALD) high permittivity dielectric films (Al"2O"3 and Al"2O"3/HfO"2 nanolaminates) subjected to ion irradiation (25MeV oxygen ions and 10MeV protons) are evaluated. The ...
- articleJuly 2011
Ultrathin EOT high-κ/metal gate devices for future technologies: Challenges, achievements and perspectives (invited)
Microelectronic Engineering (MCEE), Volume 88, Issue 7Pages 1317–1322https://doi.org/10.1016/j.mee.2011.03.121Ultrathin EOT-values are achieved by using optimized processing conditions and interface layer scavenging in metal-gated (TiN and TaN) HfO"2 based planar and bulk-FinFET devices. EOT values down to 4.5A(T"i"n"v~8.5A) in the planar devices and T"i"n"v<...
- articleJuly 2011
Evaluation of the N- and La-induced defects in the high-κ gate stack using low frequency noise characterization
Microelectronic Engineering (MCEE), Volume 88, Issue 7Pages 1255–1258https://doi.org/10.1016/j.mee.2011.03.109Low frequency noise (LFN) characterization was performed on the HfSiON gate stacks fabricated with the SiON interfacial layers (ILs) and a La cap layer. The LFN data identified N and La related defects located in the IL/HK region.
- articleJuly 2011
Interface composition of atomic layer deposited HfO2 and Al2O3 thin films on InAs studied by X-ray photoemission spectroscopy
Microelectronic Engineering (MCEE), Volume 88, Issue 7Pages 1091–1094https://doi.org/10.1016/j.mee.2011.03.087We present a synchrotron-based XPS investigation on the interface between InAs and Al"2O"3 or HfO"2 layers, deposited by ALD at different temperatures, for InAs substrates with different surface orientations as well as for InAs nanowires. We reveal the ...
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- articleJuly 2011
Electrical properties of TiO2-based MIM capacitors deposited by TiCl4 and TTIP based atomic layer deposition processes
- Boris Hudec,
- Kristína Hušeková,
- Aivar Tarre,
- Jeong Hwan Han,
- Sora Han,
- Alica Rosová,
- Woongkyu Lee,
- Aarne Kasikov,
- Seul Ji Song,
- Jaan Aarik,
- Cheol Seong Hwang,
- Karol Fröhlich
Microelectronic Engineering (MCEE), Volume 88, Issue 7Pages 1514–1516https://doi.org/10.1016/j.mee.2011.03.059In this work, we have prepared metal-insulator-metal capacitors for dynamic random access memory capacitor application using atomic layer deposition of TiO"2 high-@k dielectric and RuO"2 bottom electrode. We compare TiO"2 layers grown using TiCl"4 ...
- articleJanuary 2011
Interplay of plasma etch, strip and wet clean in patterning La2O3/HfO2-containing high-κ/metal gate stacks
Microelectronic Engineering (MCEE), Volume 88, Issue 1Pages 21–27https://doi.org/10.1016/j.mee.2010.08.009The removal process of the La"2O"3/HfO"2 dielectric and of the residues after metal gate etch are discussed. The challenges are presented and related to the specific physico-chemical properties of La-containing compounds. Solutions based on optimization ...
- articleJuly 2009
Stability of Si impurity in high-κ oxides
Microelectronic Engineering (MCEE), Volume 86, Issue 7-9Pages 1780–1781https://doi.org/10.1016/j.mee.2009.03.119The interface structure of a high permittivity (high-@k) oxide with Si substrate affects the electrical properties of the high-@k based transistors. Our theoretical analysis suggests that the formation of a SiO"2 layer at the high-@k/Si interface ...
- articleJuly 2009
Tuning the dipole at the High-κ/SiO2 interface in advanced metal gate stacks
Microelectronic Engineering (MCEE), Volume 86, Issue 7-9Pages 1740–1742https://doi.org/10.1016/j.mee.2009.03.105Combining two different electrical characterisation methods on the same MOS capacitors, we demonstrate that the flat band voltage of High-@k metal gate stack is determined by a dipole at the High-@k/SiO"2 interface. Meanwhile, roll-off of flat band ...
- articleJuly 2009
Flat band voltage control on low Vt metal-gate/high-κ CMOSFETs with small EOT (Invited Paper)
- Albert Chin,
- M. F. Chang,
- S. H. Lin,
- W. B. Chen,
- P. T. Lee,
- F. S. Yeh,
- C. C. Liao,
- M. -F. Li,
- N. C. Su,
- S. J. Wang
Microelectronic Engineering (MCEE), Volume 86, Issue 7-9Pages 1728–1732https://doi.org/10.1016/j.mee.2009.03.075The unwanted high threshold voltage (V"t) is the major challenge for metal-gate/high-@k CMOS especially at small equivalent-oxide-thickness (EOT). We have investigated the high V"t issue that is due to flat-band voltage (V"f"b) roll-off at smaller EOT. A ...
- articleJuly 2009
Experimental evidence of suppression on oxygen vacancy formation in Hf based high-κ gate dielectrics with La incorporation
Microelectronic Engineering (MCEE), Volume 86, Issue 7-9Pages 1703–1706https://doi.org/10.1016/j.mee.2009.03.047Experimental evidence of suppression on oxygen vacancy formation in Hf based high-@k gate dielectrics with La incorporation is provided by using modified charge-pumping (CP) techniques. The original distribution of interface traps and bulk traps of pure ...
- articleMarch 2009
“Smart” TDDB algorithm for investigating degradation in high-κ gate dielectric stacks under constant voltage stress
Microelectronic Engineering (MCEE), Volume 86, Issue 3Pages 287–290https://doi.org/10.1016/j.mee.2008.09.024A new ''smart'' algorithm with adaptive testing is developed for automatically monitoring gate dielectric degradation during CVS using SILC. In this approach, stress current is monitored with a sampling rate as fast as ~2ms/point while SILC data are ...
- research-articleSeptember 2008
Multiscale simulation of MOS systems based on high-κ oxides
Journal of Computational Electronics (SPJCE), Volume 7, Issue 3Pages 398–402https://doi.org/10.1007/s10825-007-0160-8AbstractWe report on a multiscale simulation approach that includes both macroscopic drift-diffusion current model and quantum tunneling model. The models are solved together in a self-consistent way inside a single simulation package. As an example, we ...
- articleSeptember 2007
Improvements of ozone surface treatment on the electrical characteristics and reliability in HfO2 gate stacks
Microelectronic Engineering (MCEE), Volume 84, Issue 9-10Pages 1898–1901https://doi.org/10.1016/j.mee.2007.04.127In this study, we improved the interfacial properties of high-@k gate stacks with the surface treatment of ozonated water prior to deposition of hafnium oxide (HfO"2). We demonstrated that the Ozone-oxide improved the electrical properties of the HfO"2 ...
- articleSeptember 2007
Monte Carlo simulations of InGaAs nano-MOSFETs
Microelectronic Engineering (MCEE), Volume 84, Issue 9-10Pages 2358–2361https://doi.org/10.1016/j.mee.2007.04.111The potential performance of sub-50 nm n-type implant free III-V MOSFETs with an In"0"."7"5Ga"0"."2"5As channel is studied using Monte Carlo (MC) device simulations. The simulated I"D-V"G characteristics of the In"0"."7"5Ga"0"."2"5As implant free ...
- articleSeptember 2007
Performance assessment of (110) p-FET high-κ/MG: is it mobility or series resistance limited?
- L. Trojman,
- L. Pantisano,
- S. Severi,
- E. San Andres,
- T. Hoffman,
- I. Ferain,
- S. De Gendt,
- M. Heyns,
- H. Maes,
- G. Groeseneken
Microelectronic Engineering (MCEE), Volume 84, Issue 9-10Pages 2058–2062https://doi.org/10.1016/j.mee.2007.04.090In this article the impact of Si-substrate orientation on mobility performance is studied for p-MOSFET's with both HfSiON and SiON based dielectrics. Consistent with previous studies, the I"o"n at fixed I"o"f"f is 100% larger for Si(110) larger than for ...
- articleSeptember 2007
Analysis of the post-breakdown current in HfO2/TaN/TiN gate stack MOSFETs for low applied biases
Microelectronic Engineering (MCEE), Volume 84, Issue 9-10Pages 1960–1963https://doi.org/10.1016/j.mee.2007.04.012A thorough analysis of the post-breakdown current-voltage characteristics in HfO"2high-@k/TaN/TiN gate stacks for low positive applied biases reveals an apparent band gap narrowing of the silicon substrate at the very location of the leakage site. This ...
- articleSeptember 2007
Monte Carlo simulations of InGaAs nano-MOSFETs
Microelectronic Engineering (MCEE), Volume 84, Issue 9-10Pages 2150–2153https://doi.org/10.1016/j.mee.2007.04.011The potential performance of sub-50 nm n-type implant free III-V MOSFETs with an In"0"."7"5Ga"0"."2"5As channel is studied using Monte Carlo (MC) device simulations. The simulated I"D-V"G characteristics of the In"0"."7"5Ga"0"."2"5As implant free ...
- research-articleSeptember 2007
On the impact of high-κ gate stacks on mobility: A Monte Carlo study including coupled SO phonon-plasmon scattering
Journal of Computational Electronics (SPJCE), Volume 6, Issue 1-3Pages 1–5https://doi.org/10.1007/s10825-006-0059-9AbstractHfO2 based high-κ dielectrics are among the most likely candidates to replace SiO2 and the currently favoured oxinitride in the next generation of MOSFETs. High-κ materials allow the use of a thicker gate dielectric, maintaining the gate ...
- articleMay 2007
Processing and evaluation of metal gate/high-κ/Si capacitors incorporating Al, Ni, TiN, and Mo as metal gate, and ZrO2 and HfO2 as high-κ dielectric
Microelectronic Engineering (MCEE), Volume 84, Issue 5-8Pages 1635–1638https://doi.org/10.1016/j.mee.2007.01.176We evaluate various metal gate/high-@k/Si capacitors by their resulting electrical characteristics. Therefore, we process MOS gate stacks incorporating aluminium (Al), nickel (Ni), titanium-nitride (TiN), and molybdenum (Mo) as the gate material, and ...