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- General Chair:
- Paul Chow,
- Program Chair:
- Peter Cheung
FPGA 2009 is the 17th annual meeting of the ACM International Symposium on Field-Programmable Gate Arrays. As we gather again in Monterey, CA, we welcome you to this premier conference for the presentation of the latest research and advances in all areas related to FPGAs.
This year, we received 92 submissions from which we selected 24 excellent quality full papers for presentation at the Symposium (acceptance rate of 26%). This cohort of full-length papers provides a balanced program with strong contributions in the three areas of FPGA architecture (6), CAD tools (10) and applications (8).
In an effort to widen participation, we also introduce a new category known as "short papers", each having a 4-page publication, a short (5 minutes) presentation and a poster presentation. In all, eleven short papers were chosen. We will also have over 30 poster presentations that provide additional opportunities for researchers to present their work.
Delegates to this year's Symposium will enjoy an interesting pre-conference workshop on research challenges and opportunities in emerging applications, and an interesting debate during the Panel Session on Monday evening on "CMOS vs Nano: Comrades or Rivals?".
Proceeding Downloads
SmartOpt: an industrial strength framework for logic synthesis
In recent years, the maximum logic capacity of each successive FPGA family has been increasing by more than 50%, which motivates scalable solutions. Meanwhile, academic research in logic synthesis has been fruitful, but these advances have been ...
Cholesky decomposition using fused datapath synthesis
In this paper we present an implementation of a Cholesky decomposition core, with IEEE754 single precision arithmetic. The datapaths are generated using fused datapath synthesis, created with an experimental floating point compiler tool, capable of ...
Diagonal tracks in FPGAs: a performance evaluation
This article presents the performance evaluation of two new diagonal routing tracks in FPGAs. We discuss the automatic detailed architecture generation issues and propose changes in the conventional placement and routing to suit these architectures ...
Cited By
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Liu Y, Wang Z, Che B, Chen Y, Zhao J and Yue Y (2023). FPGA versus GPU for accelerating homomorphic encryption in federated learning International Workshop on Signal Processing and Machine Learning (WSPML 2023), 10.1117/12.3014890, 9781510671928, (55)
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Xue T, Wang Y, Deng X, Zhu S, Yu Q, Su J, Chen L and Chu J (2022). GPU implementation in real-time target search for push-broom hyperspectral imagery Eighth Symposium on Novel Photoelectronic Detection Technology and Applications, 10.1117/12.2619466, 9781510653115, (3)
Index Terms
- Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays