research-article

Near memory key/value lookup acceleration

Authors:

Maya GokhaleAuthors Info & Claims

MEMSYS '17: Proceedings of the International Symposium on Memory Systems

Pages 26 - 33

https://doi.org/10.1145/3132402.3132434

Published: 02 October 2017 Publication History

Abstract

In the "Big Data" era, fast lookup of keys in a key/value store is a ubiquitous operation. We have designed a near memory accelerator combining simple hardware building blocks to accelerate lookup in a hash table based key/value store. We report on the co-design of hardware and software to accomplish fast lookup using open addressing. The accelerator implements a batch get command to look up a set of keys in a single request. Using an FPGA emulator, we evaluate the performance of a query workload under a comprehensive range of conditions such as hash table load factor (fill) and query key repeat distribution (likelihood of a key to reappear in a query workload). We emulate two memory configurations: Hybrid Memory Cube (or High Bandwidth Memory), and Storage Class Memory. Our design shows 12.8X - 2.9X speedup compared to conventional CPU lookup depending on workload characteristics.

References

[1]

Emulator Software. https://bitbucket.org/PerMA/emulator_st.

[2]

Redis. https://redis.io.

[3]

Riak KV. http://basho.com/products/riak-kv/.

[4]

S. K. Ames, D. A. Hysom, S. N. Gardner, G. S. Lloyd, M. B. Gokhale, and J. E. Allen. Scalable metagenomic taxonomy classification using a reference genome database. Bioinformatics, 2013.

[5]

B. Atikoglu, Y. Xu, E. Frachtenberg, S. Jiang, and M. Paleczny. Workload analysis of a large-scale key-value store. SIGMETRICS Perform. Eval. Rev., 40(1):53--64, June 2012.

Digital Library

[6]

N. Binkert, B. Beckmann, G. Black, S. K. Reinhardt, A. Saidi, A. Basu, J. Hestness, D. R. Hower, T. Krishna, S. Sardashti, R. Sen, K. Sewell, M. Shoaib, N. Vaish, M. D. Hill, and D. A. Wood. The gem5 simulator. In ACM SIGARCH Computer Architecture News. ACM, May 2011.

Digital Library

[7]

P. Celis. Robin Hood Hashing. PhD thesis, Waterloo, Ont., Canada, Canada, 1986.

Digital Library

[8]

T. H. Cormen, C. E. Leiserson, R. L. Rivest, and C. Stein. Introduction to Algorithms, 2^nd Edition. MIT Press, 2001.

Digital Library

[9]

B. Fitzpatrick. Distributed caching with memcached. In Linux Journal, Aug. 2004.

Digital Library

[10]

E. Georganas, A. Buluc, J. Chapman, S. Hofmeyr, C. Aluru, R. Egan, L. Oliker, D. Rokhsar, and K. Yelick. Hipmer: An extreme-scale de novo genome assembler. In Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC15), Nov. 2015.

Digital Library

[11]

M. Gokhale, S. Lloyd, and C. Hajas. Near memory data structure rearrangement. In Proceedings of the 2015 International Symposium on Memory Systems, MEMSYS '15, pages 283--290, Washington DC, USA, Oct 2015. ACM.

Digital Library

[12]

M. Gokhale, S. Lloyd, and C. Macaraeg. Hybrid Memory Cube performance characterization on data-centric workloads. In Proceedings of the 5th Workshop on Irregular Applications: Architectures and Algorithms, IA3 '15, pages 7:1--7:8, Austin, TX, USA, Nov 2015. ACM.

Digital Library

[13]

Y. Gottesman, J. Nider, R. Kat, Y. Weinsberg, and M. Factor. Using storage class memory efficiently for an in-memory database. In Proceedings of the 9th ACM International on Systems and Storage Conference, SYSTOR '16, pages 21:1--21:1, New York, NY, USA, 2016. ACM.

Digital Library

[14]

K. Hsieh, S. Khan, N. Vijaykumar, K. K. Chang, A. Boroumand, S. Ghose, and O. Mutlu. Accelerating pointer chasing in 3d-stacked memory: Challenges, mechanisms, evaluation. In Computer Design (ICCD), 2016 IEEE 34th International Conference on, pages 25--32. IEEE, 2016.

[15]

Z. István, G. Alonso, M. Blott, and K. Vissers. A hash table for line-rate data processing. ACM Trans. Reconfigurable Technol. Syst., 8(2):13:1--13:15, Mar. 2015.

Digital Library

[16]

B. Jenkins. SpookyHash. http://burtleburtle.net/bob/hash/spooky.html.

[17]

M. Jung, D. M. Mathew, C. Weis, N. Wehn, I. Heinrich, M. V. Natale, and S. O. Krumke. Congen: An application specific dram memory controller generator. In Proceedings of the Second International Symposium on Memory Systems, MEMSYS '16, pages 257--267, New York, NY, USA, 2016. ACM.

Digital Library

[18]

H. Lim, B. Fan, D. G. Andersen, and M. Kaminsky. SILT: A memory-efficient, high-performance key-value store. In Proc. 23rd ACM Symposium on Operating Systems Principles (SOSP), Cascais, Portugal, Oct. 2011.

Digital Library

[19]

S. Lloyd and M. Gokhale. In-memory data rearrangement for irregular, data-intensive computing. IEEE Computer, 48(8):18--25, Aug 2015.

[20]

N. Mcvicar, C.-C. Lin, and S. Hauck. K-mer counting using Bloom filters with an FPGA-attached HMC. In Field-Programmable Custom Computing Machines (FCCM), The 25th Annual International Symposium on, 2017.

[21]

N. Mirzadeh, Y. O. Koçberber, B. Falsafi, and B. Grot. Sort vs. hash join revisited for near-memory execution. In 5th Workshop on Architectures and Systems for Big Data (ASBD 2015), number EPFL-TALK-209111, 2015.

[22]

S. Tanaka and C. Kozyrakis. High performance hardware-accelerated flash key-value store. In Non-volative Memories Workshop (NVMW), 2014.

[23]

H. Volos, G. Magalhaes, L. Cherkasova, and J. Li. Quartz: A lightweight performance emulator for persistent memory software. In Proceedings of the 16th Annual Middleware Conference, Middleware '15, pages 37--49, New York, NY, USA, 2015. ACM.

Digital Library

[24]

X. Wang, J. Leidel, and Y. Chen. Concurrent dynamic memory coalescing on goblincore-64 architecture. In Proceedings of the 2016 International Symposium on Memory Systems, MEMSYS '16, Washington DC, USA, Oct 2016. ACM.

Digital Library

[25]

S. Xu, S. Lee, S.-W. Jun, M. Liu, J. Hicks, and Arvind. Bluecache: A scalable distributed flash-based key-value store. Proc. VLDB Endow., 10(4):301--312, Nov. 2016.

Digital Library

Cited By

Chen JGómez-Luna JEl Hajj IGuo YMutlu O(2023)SimplePIM: A Software Framework for Productive and Efficient Processing-in-Memory2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT)10.1109/PACT58117.2023.00017(99-111)Online publication date: 21-Oct-2023
https://doi.org/10.1109/PACT58117.2023.00017
Gómez-Luna JGuo YBrocard SLegriel JCimadomo ROliveira GSingh GMutlu O(2023)Evaluating Machine LearningWorkloads on Memory-Centric Computing Systems2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS57527.2023.00013(35-49)Online publication date: Apr-2023
https://doi.org/10.1109/ISPASS57527.2023.00013
Kee MHan CPark G(2023)An Integrated Solution to Improve Performance of In-Memory Data Caching With an Efficient Item Retrieving Mechanism and a Near-Memory AcceleratorIEEE Access10.1109/ACCESS.2023.329258211(78726-78736)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3292582
Show More Cited By

Index Terms

Near memory key/value lookup acceleration

Recommendations

Near memory data structure rearrangement
MEMSYS '15: Proceedings of the 2015 International Symposium on Memory Systems

As CPU core counts continue to increase, the gap between compute power and available memory bandwidth has widened. A larger and deeper cache hierarchy benefits locality-friendly computation, but offers limited improvement to irregular, data intensive ...
Evaluating the feasibility of storage class memory as main memory
MEMSYS '16: Proceedings of the Second International Symposium on Memory Systems

Storage class memory offers the prospect of large capacity persistent memory with DRAM-like access latency. In this work, we evaluate the performance of a small set of benchmarks using SCM as main memory. We use an FPGA emulator to model a range of ...
Design space exploration of near memory accelerators
MEMSYS '18: Proceedings of the International Symposium on Memory Systems

We describe an in-progress approach to resolving the opposing goals of speed and accuracy in designing, prototyping, and evaluating the system level performance of near-memory accelerators. Hardware emulators offer high fidelity and speed at the expense ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Other conferences

MEMSYS '17: Proceedings of the International Symposium on Memory Systems

October 2017

409 pages

ISBN:9781450353359

DOI:10.1145/3132402

General Chair:
Bruce Jacob
University of Maryland

Copyright © 2017 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 02 October 2017

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Conference

MEMSYS 2017

MEMSYS 2017: The International Symposium on Memory Systems, 2017

October 2 - 5, 2017

Virginia, Alexandria

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

20
Total Citations
View Citations
434
Total Downloads

Downloads (Last 12 months)38
Downloads (Last 6 weeks)9

Reflects downloads up to 16 Dec 2024

Other Metrics

View Author Metrics

Citations

Cited By

Chen JGómez-Luna JEl Hajj IGuo YMutlu O(2023)SimplePIM: A Software Framework for Productive and Efficient Processing-in-Memory2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT)10.1109/PACT58117.2023.00017(99-111)Online publication date: 21-Oct-2023
https://doi.org/10.1109/PACT58117.2023.00017
Gómez-Luna JGuo YBrocard SLegriel JCimadomo ROliveira GSingh GMutlu O(2023)Evaluating Machine LearningWorkloads on Memory-Centric Computing Systems2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS57527.2023.00013(35-49)Online publication date: Apr-2023
https://doi.org/10.1109/ISPASS57527.2023.00013
Kee MHan CPark G(2023)An Integrated Solution to Improve Performance of In-Memory Data Caching With an Efficient Item Retrieving Mechanism and a Near-Memory AcceleratorIEEE Access10.1109/ACCESS.2023.329258211(78726-78736)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3292582
Jin CZhang HYin LZhang YFeng S(2022)Optimize data-driven multi-agent simulation for COVID-19 transmissionBMC Bioinformatics10.1186/s12859-022-04799-423:1Online publication date: 1-Jul-2022
https://doi.org/10.1186/s12859-022-04799-4
Cılasun HMacaraeg CPeng ISarkar AGokhale M(2022)FPGA-accelerated simulation of variable latency memory systemsProceedings of the 2022 International Symposium on Memory Systems10.1145/3565053.3565061(1-11)Online publication date: 3-Oct-2022
https://dl.acm.org/doi/10.1145/3565053.3565061
Choe JCrotty AMoreshet THerlihy MBahar RAgrawal KLee I(2022)HybriDSProceedings of the 34th ACM Symposium on Parallelism in Algorithms and Architectures10.1145/3490148.3538591(321-332)Online publication date: 11-Jul-2022
https://dl.acm.org/doi/10.1145/3490148.3538591
Gomez-Luna JGuo YBrocard SLegriel JCimadomo ROliveira GSingh GMutlu O(2022)Machine Learning Training on a Real Processing-in-Memory System2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI54635.2022.00064(292-295)Online publication date: Jul-2022
https://doi.org/10.1109/ISVLSI54635.2022.00064
Fernandez IQuislant RGiannoula CAlser MGomez-Luna JGutierrez EPlata OMutlu O(2022)Exploiting Near-Data Processing to Accelerate Time Series Analysis2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI54635.2022.00061(279-282)Online publication date: Jul-2022
https://doi.org/10.1109/ISVLSI54635.2022.00061
Boroumand AGhose SOliveira GMutlu O(2022)Polynesia: Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Co-Design2022 IEEE 38th International Conference on Data Engineering (ICDE)10.1109/ICDE53745.2022.00270(2997-3011)Online publication date: May-2022
https://doi.org/10.1109/ICDE53745.2022.00270
Gomez-Luna JHajj IFernandez IGiannoula COliveira GMutlu O(2022)Benchmarking a New Paradigm: Experimental Analysis and Characterization of a Real Processing-in-Memory SystemIEEE Access10.1109/ACCESS.2022.317410110(52565-52608)Online publication date: 2022
https://doi.org/10.1109/ACCESS.2022.3174101
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Table of Contents