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The Future Evolution of High-Performance Microprocessors

Published: 12 November 2005 Publication History

Abstract

The evolution of high-performance microprocessors has reached several significant inflection points. First, the marginal utility of additional single-core complexity is now rapidly diminishing due to a number of factors. The increase in instructions per cycle from increases in sizes and numbers of functional units has plateaued. Meanwhile the increasing sizes of functional units and cores are having a significant negative impact on pipeline depths and the scalability of processor clock cycle times. Second, the power of high performance microprocessors has increased rapidly over the last two decades, even as device switching energies have been significantly reduced by supply voltage scaling. However future voltage scaling will be limited by minimum practical threshold voltages. Current high-performance microprocessors are already near limits of acceptable power dissipation. Thus scaling microprocessor performance while maintaining or even reducing overall power dissipation will prove especially challenging. This keynote talk will discuss these issues and propose likely scenarios for the future evolution of high-performance microprocessors.

Cited By

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  • (2009)An energy and performance exploration of network-on-chip architecturesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.201123217:3(319-329)Online publication date: 1-Mar-2009
  • (2007)Microprocessors in the era of terascale integrationProceedings of the conference on Design, automation and test in Europe10.5555/1266366.1266417(237-242)Online publication date: 16-Apr-2007

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      cover image ACM Conferences
      MICRO 38: Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
      November 2005
      350 pages
      ISBN:0769524400

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      IEEE Computer Society

      United States

      Publication History

      Published: 12 November 2005

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      MICRO 38 Paper Acceptance Rate 29 of 147 submissions, 20%;
      Overall Acceptance Rate 484 of 2,242 submissions, 22%

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      Cited By

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      • (2009)An energy and performance exploration of network-on-chip architecturesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.201123217:3(319-329)Online publication date: 1-Mar-2009
      • (2007)Microprocessors in the era of terascale integrationProceedings of the conference on Design, automation and test in Europe10.5555/1266366.1266417(237-242)Online publication date: 16-Apr-2007

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