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Retention state-aware energy management for efficient nonvolatile processors: work-in-progress

Published: 15 October 2017 Publication History

Abstract

Harvested energy is intrinsically unstable and program execution will be interrupted frequently. To solve this problem, nonvolatile processor (NVP) is proposed because it can back up volatile state before the system energy is depleted. However, the backup and the recovery processes also consume non-negligible energy and delay program progress. To improve the performance of NVP, retention state has been proposed recently which can enable a system to retain the volatile data to wait for power resumption instead of saving data immediately. The objective of this paper is to forward program execution progress as much as possible by exploiting the retention state. Compared to the instant backup scheme, preliminary evaluation results report that power failures can be reduced by 81.6% and computation efficiency can be increased by 105%.

References

[1]
M. Zhao et al. 2017. Stack-size Sensitive On-chip Memory Backup for Self-powered Non-volatile Processors. TCAD IEEE Early Access Article (2017).
[2]
Y. Liu et al. 2016. 4.7 A 65nm ReRAM-enabled nonvolatile processor with 6x reduction in restore time and 4x higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic. In ISSCC'16. 84--86.
[3]
K. Ma, Y. Zheng, S. Li, K. Swaminathan, X. Li, Y. Liu, J. Sampson, Y. Xie, and V. Narayanan. 2015. Architecture exploration for ambient energy harvesting nonvolatile processors. In HPCA'15. 526--537.

Cited By

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  • (2021)Performance-oriented cache management scheme based on a retention state for energy-harvesting nonvolatile processorsFuture Generation Computer Systems10.1016/j.future.2021.11.010Online publication date: Nov-2021

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Published In

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CODES '17: Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion
October 2017
84 pages
ISBN:9781450351850
DOI:10.1145/3125502
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 October 2017

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Author Tags

  1. NVP
  2. energy management
  3. retention state

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  • Research-article

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ESWEEK'17
ESWEEK'17: THIRTEENTH EMBEDDED SYSTEM WEEK
October 15 - 20, 2017
Seoul, Republic of Korea

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Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

View all
  • (2021)Performance-oriented cache management scheme based on a retention state for energy-harvesting nonvolatile processorsFuture Generation Computer Systems10.1016/j.future.2021.11.010Online publication date: Nov-2021

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