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An APL microprogramming structure

Authors:

Stanley M. Nissen,

Steven J. WallachAuthors Info & Claims

MICRO 6: Conference record of the 6th annual workshop on Microprogramming

Pages 50 - 57

https://doi.org/10.1145/800203.806234

Published: 24 September 1973 Publication History

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Abstract

Several papers have been published (Ref. 1, 2, 3) which describe an APL machine. The APL machines by Zaks, et al and Hassitt, et al, describe a microprogrammed approach which uses pre-existing microinstruction formats and machine capabilities. No special hardware was added to enhance the execution of APL statements.

References

[1]

Zaks, R., Steingart, D., and Moore, J., "A Firmware APL Timesharing System", SJCC, 1971, pp. 179-190.

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[2]

Hassitt, A., Lageschulte, J. W., and Lyon, L. E., "Implementation of a High Level Language Machine", CACM, April 1973, Vol. 16, Number 4, pp. 199-212.

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[3]

Abrams, P. S., "An APL Machine", AD 706741, February 1970.

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[4]

Texas Instruments, "Description of the ASC System Hardware", October 1970.

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[5]

APL/360 Primer, Form GH20-0629-IBM Corp., 1970.

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[6]

Preliminary Programmer's Manual, BR-7162-3, Raytheon Corp., Bedford, Mass., December 1972.

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[7]

Falkoff, A. D., Iverson, K. E., and Sussenguth, "A formal description of System 360", IBM Systems Journal, Vol. 3, No. 3, 1964.

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[8]

The '@@@@' delimiter is the APL function {equation}

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[9]

The space required for a statement representation in bytes is (using APL){equation} Where SYLS is the sum of the byte representation of identifiers, special characters, and constants.

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[10]

Wallach, S. J., "Formally Describing and Functionally Verifying the AADC DPE", AADC Symposium, Orlando, Florida, January 23-25, 1973.

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Cited By

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Zhang CVahid FLysecky R(2004)A self-tuning cache architecture for embedded systemsACM Transactions on Embedded Computing Systems10.1145/993396.9934053:2(407-425)Online publication date: 1-May-2004
https://dl.acm.org/doi/10.1145/993396.993405
Noguera JBadia R(2004)Multitasking on reconfigurable architectures: microarchitecture support and dynamic schedulingACM Transactions on Embedded Computing Systems10.1145/993396.9934043:2(385-406)Online publication date: 1-May-2004
https://dl.acm.org/doi/10.1145/993396.993404
Adve VVernon M(2004)Parallel program performance prediction using deterministic task graph analysisACM Transactions on Computer Systems10.1145/966785.96678822:1(94-136)Online publication date: 1-Feb-2004
https://dl.acm.org/doi/10.1145/966785.966788
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Index Terms

An APL microprogramming structure
1. Hardware
  1. Electronic design automation
    1. Methodologies for EDA
  2. Integrated circuits
    1. Logic circuits
      1. Arithmetic and datapath circuits
      2. Design modules and hierarchy
2. Software and its engineering
  1. Software notations and tools
    1. Context specific languages
    2. General programming languages
      1. Language types

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Published In

MICRO 6: Conference record of the 6th annual workshop on Microprogramming

September 1973

183 pages

ISBN:9781450377836

DOI:10.1145/800203

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 24 September 1973

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Cited By

View all

Zhang CVahid FLysecky R(2004)A self-tuning cache architecture for embedded systemsACM Transactions on Embedded Computing Systems10.1145/993396.9934053:2(407-425)Online publication date: 1-May-2004
https://dl.acm.org/doi/10.1145/993396.993405
Noguera JBadia R(2004)Multitasking on reconfigurable architectures: microarchitecture support and dynamic schedulingACM Transactions on Embedded Computing Systems10.1145/993396.9934043:2(385-406)Online publication date: 1-May-2004
https://dl.acm.org/doi/10.1145/993396.993404
Adve VVernon M(2004)Parallel program performance prediction using deterministic task graph analysisACM Transactions on Computer Systems10.1145/966785.96678822:1(94-136)Online publication date: 1-Feb-2004
https://dl.acm.org/doi/10.1145/966785.966788
Olshefski DNieh JAgrawal D(2004)Using certes to infer client response time at the web serverACM Transactions on Computer Systems10.1145/966785.96678722:1(49-93)Online publication date: 1-Feb-2004
https://dl.acm.org/doi/10.1145/966785.966787
Reumann JShin K(2004)Stateful distributed interpositionACM Transactions on Computer Systems10.1145/966785.96678622:1(1-48)Online publication date: 1-Feb-2004
https://dl.acm.org/doi/10.1145/966785.966786
(2002)Temporal abstract classes and virtual temporal specifications for real-time systemsACM Transactions on Software Engineering and Methodology10.1145/567793.56779411:3(291-308)Online publication date: 1-Jul-2002
https://dl.acm.org/doi/10.1145/567793.567794
Pratt TMaydwell G(1982)Experience with the formal semantic definition of HAL/SACM SIGPLAN Notices10.1145/872726.80700717:6(327-333)Online publication date: 1-Jun-1982
https://dl.acm.org/doi/10.1145/872726.807007
Baker T(1982)A single-pass syntax-directed front end for AdaACM SIGPLAN Notices10.1145/872726.80700617:6(318-326)Online publication date: 1-Jun-1982
https://dl.acm.org/doi/10.1145/872726.807006
Avakian AHaradhvala SKnobe B(1982)The design of an integrated support software systemACM SIGPLAN Notices10.1145/872726.80700517:6(308-317)Online publication date: 1-Jun-1982
https://dl.acm.org/doi/10.1145/872726.807005
Rudmik AMoore B(1982)An efficient separate compilation strategy for very large programsACM SIGPLAN Notices10.1145/872726.80700417:6(301-307)Online publication date: 1-Jun-1982
https://dl.acm.org/doi/10.1145/872726.807004
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