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Register allocation across procedure and module boundaries

Authors:

Vatsa Santhanam,

Daryl OdnertAuthors Info & Claims

PLDI '90: Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation

Pages 28 - 39

https://doi.org/10.1145/93542.93551

Published: 01 June 1990 Publication History

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Abstract

This paper describes a method for compiling programs using interprocedural register allocation. A strategy for handling programs built from multiple modules is presented, as well as algorithms for global variable promotion and register spill code motion. These algorithms attempt to address some of the shortcomings of previous interprocedural register allocation strategies. Results are given for an implementation on a single register file RISC-based architecture.

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Cited By

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Geden MRasmussen K(2023)RegGuardComputers and Security10.1016/j.cose.2023.103213129:COnline publication date: 1-Jun-2023
https://dl.acm.org/doi/10.1016/j.cose.2023.103213
Gopinath K(2010)Register AllocationThe Compiler Design Handbook10.1201/9781420040579.ch13Online publication date: 7-Mar-2010
https://doi.org/10.1201/9781420040579.ch13
Huang YChilders BSoffa M(2010)Detecting bugs in register allocationACM Transactions on Programming Languages and Systems10.1145/1734206.173421232:4(1-36)Online publication date: 22-Apr-2010
https://dl.acm.org/doi/10.1145/1734206.1734212
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Register allocation across procedure and module boundaries

This paper describes a method for compiling programs using interprocedural register allocation. A strategy for handling programs built from multiple modules is presented, as well as algorithms for global variable promotion and register spill code motion...
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Micro-architecture designers are very cautious about expanding the number of architected registers (also the register field), because increasing the register field adds to the code size, raises I-cache and memory pressure, complicates processor ...
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Micro-architecture designers are very cautious about expanding the number of architected registers (also the register field), because increasing the register field adds to the code size, raises I-cache and memory pressure, complicates processor ...

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Published In

PLDI '90: Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation

June 1990

351 pages

ISBN:0897913647

DOI:10.1145/93542

Chairman:
Bernard N. Fischer

ACM SIGPLAN Notices Volume 25, Issue 6
Jun. 1990
343 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/93548
Editor:
Marina Chen
Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 1990

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Cited By

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Geden MRasmussen K(2023)RegGuardComputers and Security10.1016/j.cose.2023.103213129:COnline publication date: 1-Jun-2023
https://dl.acm.org/doi/10.1016/j.cose.2023.103213
Gopinath K(2010)Register AllocationThe Compiler Design Handbook10.1201/9781420040579.ch13Online publication date: 7-Mar-2010
https://doi.org/10.1201/9781420040579.ch13
Huang YChilders BSoffa M(2010)Detecting bugs in register allocationACM Transactions on Programming Languages and Systems10.1145/1734206.173421232:4(1-36)Online publication date: 22-Apr-2010
https://dl.acm.org/doi/10.1145/1734206.1734212
Gesellensetter LGlesner S(2008)Interprocedural Speculative Optimization of Memory Accesses to Global VariablesProceedings of the 14th international Euro-Par conference on Parallel Processing10.1007/978-3-540-85451-7_38(350-359)Online publication date: 26-Aug-2008
https://dl.acm.org/doi/10.1007/978-3-540-85451-7_38
Triantafyllis SBridges MRaman EOttoni GAugust DSchwartzbach MBall T(2006)A framework for unrestricted whole-program optimizationProceedings of the 27th ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/1133981.1133989(61-71)Online publication date: 11-Jun-2006
https://dl.acm.org/doi/10.1145/1133981.1133989
Triantafyllis SBridges MRaman EOttoni GAugust D(2006)A framework for unrestricted whole-program optimizationACM SIGPLAN Notices10.1145/1133255.113398941:6(61-71)Online publication date: 11-Jun-2006
https://dl.acm.org/doi/10.1145/1133255.1133989
Huang YChilders BSoffa M(2006)Catching and identifying bugs in register allocationProceedings of the 13th international conference on Static Analysis10.1007/11823230_19(281-300)Online publication date: 29-Aug-2006
https://dl.acm.org/doi/10.1007/11823230_19
Zhang KZhang TPande SButtazzo G(2004)Binary translation to improve energy efficiency through post-pass register re-allocationProceedings of the 4th ACM international conference on Embedded software10.1145/1017753.1017769(74-85)Online publication date: 27-Sep-2004
https://dl.acm.org/doi/10.1145/1017753.1017769
Cilio ACorporaal H(2002)Global Variable Promotion: Using Registers to Reduce Cache Power DissipationCompiler Construction10.1007/3-540-45937-5_18(247-261)Online publication date: 28-Mar-2002
https://doi.org/10.1007/3-540-45937-5_18
Debray S(1999)Link-time Optimization of Multi-Language ProgramsThe Logic Programming Paradigm10.1007/978-3-642-60085-2_5(109-126)Online publication date: 1999
https://doi.org/10.1007/978-3-642-60085-2_5
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Register allocation across procedure and module boundaries

Differential register allocation

Differential register allocation