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Inference machine: From sequential to parallel

Published: 13 June 1983 Publication History

Abstract

In this paper, the research and development plan for computer architecture in the fifth generation computer system project ( FGCS Project) is described, focusing on the research on the inference machine.

References

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Moto-oka, T. "Overview to the fifth generation computer system project", Proc. of 10th Int'l Sympo. on Computer Architecture, June 1983.
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Uchida, S. "Toward a New Generation Computer Architecture", in VLSI Architecture as chap. 19, Prentice Hall ( to appear ), and also as Tech. Rep. of ICOT, TR-001, Aug. 1982.
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Chikayama, T., et al, "A Draft Proposal of Fifth Generation Kernel Language", Tech. Memo of ICOT, TM-007, Dec. 1982.
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Pereira,L.M., Pereira,F.C.N. and Warren,D.H.D. "User's Guide to DEC system-10 PROLOG", Sept. 1978.
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Kahn,K.M. "The implementation of Uniform, A Knowledge-Representation/Programming Language based upon Equivalence of Descriptions", Tech. Rep. of UPMAIL, Dec. 1981.
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Clark, K.L. and Gregory, S. "A relational language for parallel programming", Res. Rep. DOC 81/16, Dept. of Computing, Imperial College of Science and Technology, University of London, July 1981.
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Clark,K.L. and Gregory, S. "PARLOG: A parallel Logic Programing Language", Res. Rep. DOC 83/5, Dept. of Computing, Imperial College of Science and Technology, University of London, July 1981.
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Shapiro, E.Y. "A Subset of Concurrent Prolog and Its Interpreter", Tech. Rep. of ICOT, TR-003, Feb. 1983.
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Arvind, et al, "An asynchronous programming language and computing machine", Tech. Rep. No.114A, UCI, 1976.
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Amamiya, M., et al, "A list-processing oriented dataflow machine architecture", AFIPS NCC, pp.143-151, 1982.
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Furukawa, K., et al, "Prolog Interpreter Based on Concurrent Programming", Proc. of the First Int'l Logic Programming Conf. pp. 38-44, Sept. 1982.
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Conery, J.S. and Kibler, D.F., "Parallel Interpretation of Logic Programs", Proc. of the Conf. on Functional Programming Languages and Computer Architecture, pp. 163-170, Oct. 1981.
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Greene, K.J., "A Concurrent unification Algorithm", Res. Rep. of Logic Programming Group, Syracuse Univ., Nov. 1982.

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cover image ACM Conferences
ISCA '83: Proceedings of the 10th annual international symposium on Computer architecture
June 1983
424 pages
  • cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 11, Issue 3
    June 1983
    413 pages
    ISSN:0163-5964
    DOI:10.1145/1067651
    Issue’s Table of Contents

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 13 June 1983

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  • (2005)Future parallel computersCONPAR 8610.1007/3-540-16811-7_151(40-47)Online publication date: 31-May-2005
  • (1990)Pipelined OR-parallelism architecture for parallel execution of PrologProceedings of the 3rd international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 210.1145/98894.98940(864-873)Online publication date: 1-Jun-1990
  • (1986)Survey on special purpose computer architectures for AIACM SIGART Bulletin10.1145/15715.15718(28-46)Online publication date: 1-Apr-1986
  • (1985)A hardware unification unitProceedings of the 12th annual international symposium on Computer architecture10.5555/327010.327203(198-205)Online publication date: 1-Jun-1985
  • (1985)Design of a high-speed Prolog machine (HPM)Proceedings of the 12th annual international symposium on Computer architecture10.5555/327010.327163(191-197)Online publication date: 1-Jun-1985
  • (1985)A hardware unification unitACM SIGARCH Computer Architecture News10.1145/327070.32720313:3(198-205)Online publication date: 1-Jun-1985
  • (1985)Design of a high-speed Prolog machine (HPM)ACM SIGARCH Computer Architecture News10.1145/327070.32716313:3(191-197)Online publication date: 1-Jun-1985
  • (1985)Hardware Architectures for Logic ProgrammingLogic Programming10.1007/978-94-009-5044-3_9(143-151)Online publication date: 1985
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