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Criticality-driven Design Space Exploration for Mixed-Criticality Heterogeneous Parallel Embedded Systems

Published: 23 January 2018 Publication History

Abstract

Heterogeneous platforms are becoming widely diffused in the embedded system area, mainly because of the opportunities to increase application execution performance and, at the same time, to optimize other orthogonal metrics. In such a context, the introduction of mixed-criticality constraints, while considering heterogenous parallel architectures, creates new challenges to industrial and academic research. The main design issue is related to a Design Space Exploration (DSE) approach able to cope with mixed-criticality constraints that typically limits the number of feasible solutions. So, this work1 focuses on DSE for embedded systems based on heterogeneous parallel architectures and subjected to mixed-criticality constraints. In particular, it presents a criticality-driven evolutionary approach integrated into a reference Electronic System Level HW/SW Co-Design flow to support the designer of mixed-criticality embedded systems.

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V. Muttillo, G. Valente and L. Pomante. Criticality-aware Design Space Exploration for Mixed-Criticality Embedded Systems. In Proceedings of the 9th ACM/SPEC on International Conference on Performance Engineering (ICPE '18). 2018. Accepted.

Cited By

View all
  • (2020)An OpenMP Parallel Genetic Algorithm for Design Space Exploration of Heterogeneous Multi-processor Embedded SystemsProceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms10.1145/3381427.3381431(1-6)Online publication date: 21-Jan-2020
  • (2019)A Lightweight, Hardware-Based Support for Isolation in Mixed-Criticality Network-on-Chip ArchitecturesAdvances in Science, Technology and Engineering Systems Journal10.25046/aj0404674:4Online publication date: 2019
  • (2019)Tuning DSE for Heterogeneous Multi-Processor Embedded Systems by means of a Self-Equalized Weighted Sum MethodProceedings of the 10th and 8th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms10.1145/3310411.3310412(1-4)Online publication date: 21-Jan-2019
  • Show More Cited By

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      cover image ACM Other conferences
      PARMA-DITAM '18: Proceedings of the 9th Workshop and 7th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms
      January 2018
      76 pages
      ISBN:9781450364447
      DOI:10.1145/3183767
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 23 January 2018

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      Author Tags

      1. Design Space Exploration
      2. HW/SW Co-Design
      3. Heterogeneous Parallel Systems
      4. Mixed-Criticality Systems

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      Cited By

      View all
      • (2020)An OpenMP Parallel Genetic Algorithm for Design Space Exploration of Heterogeneous Multi-processor Embedded SystemsProceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms10.1145/3381427.3381431(1-6)Online publication date: 21-Jan-2020
      • (2019)A Lightweight, Hardware-Based Support for Isolation in Mixed-Criticality Network-on-Chip ArchitecturesAdvances in Science, Technology and Engineering Systems Journal10.25046/aj0404674:4Online publication date: 2019
      • (2019)Tuning DSE for Heterogeneous Multi-Processor Embedded Systems by means of a Self-Equalized Weighted Sum MethodProceedings of the 10th and 8th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms10.1145/3310411.3310412(1-4)Online publication date: 21-Jan-2019
      • (2018)HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems2018 7th Mediterranean Conference on Embedded Computing (MECO)10.1109/MECO.2018.8406078(1-6)Online publication date: Jun-2018
      • (2018)Injecting hypervisor-based software partitions into Design Space Exploration activities considering mixed-criticality requirements2018 7th Mediterranean Conference on Embedded Computing (MECO)10.1109/MECO.2018.8406056(1-5)Online publication date: Jun-2018
      • (2018)Design Space Exploration for Mixed-Criticality Embedded Systems Considering Hypervisor-Based SW Partitions2018 21st Euromicro Conference on Digital System Design (DSD)10.1109/DSD.2018.00115(740-744)Online publication date: Aug-2018

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