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Operational and Declarative Runtime Verification (Keynote)

Published: 13 September 2024 Publication History

Abstract

Runtime verification (RV) is used to monitor executions of a system, checking them against a formal specification. It can detect failures, and can also be used to control a system, diverting its operation to avoid a failure. One can identify two main approaches of specifying properties to be monitored: operational specification and declarative specification. Operational specification describes, using a programming language like formalism, how each new monitored event updates a summary of the observed sequence of events, consisting of user defined variables. This kind of specification is attractive, e.g., for describing aggregated arithmetic calculations and can be very simple to implement. Declarative specification gives a more global view of the requirements that the monitored execution sequences must satisfy, based on a temporal formalism, e.g., propositional or first-order temporal logic. We describe an RV system designed and implemented to work with the two kinds of specifications. It allows the two parts to collaborate by sending ongoing results between them. This results in benefiting from both capabilities and reducing the deficiencies of each of the separate specification methods. We compare alternative approaches to combining operational and declarative specification as internal and external DSLs.

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Published In

cover image ACM Conferences
VORTEX 2024: Proceedings of the 7th ACM International Workshop on Verification and Monitoring at Runtime Execution
September 2024
51 pages
ISBN:9798400711190
DOI:10.1145/3679008
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the owner/author(s).

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Published: 13 September 2024

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Author Tags

  1. Expressiveness
  2. External DSL
  3. Internal DSL
  4. Monitoring
  5. Programming
  6. Runtime Verification
  7. Temporal Logic

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