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A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts

Published: 22 December 2022 Publication History

Abstract

A potential vulnerability for integrated circuits (ICs) is the insertion of hardware trojans (HTs) during manufacturing. Understanding the practicability of such an attack can lead to appropriate measures for mitigating it. In this paper, we demonstrate a pragmatic framework for analyzing HT susceptibility of finalized layouts. Our framework is representative of a fabrication-time attack, where the adversary is assumed to have access only to a layout representation of the circuit. The framework inserts trojans into tapeoutready layouts utilizing an Engineering Change Order (ECO) flow. The attacked security nodes are blindly searched utilizing reverse-engineering techniques. For our experimental investigation, we utilized three crypto-cores (AES-128, SHA-256, and RSA) and a microcontroller (RISC-V) as targets. We explored 96 combinations of triggers, payloads and targets for our framework. Our findings demonstrate that even in high-density designs, the covert insertion of sophisticated trojans is possible. All this while maintaining the original target logic, with minimal impact on power and performance. Furthermore, from our exploration, we conclude that it is too naive to only utilize placement resources as a metric for HT vulnerability. This work highlights that the HT insertion success is a complex function of the placement, routing resources, the position of the attacked nodes, and further design-specific characteristics. As a result, our framework goes beyond just an attack, we present the most advanced analysis tool to assess the vulnerability of HT insertion into finalized layouts.

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Cited By

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  • (2025)Detection of Voltage Droop-Induced Timing Fault Attacks Due to Hardware TrojansIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.341839544:1(280-293)Online publication date: 1-Jan-2025
  • (2024)REPQC: Reverse Engineering and Backdooring Hardware Accelerators for Post-quantum CryptographyProceedings of the 19th ACM Asia Conference on Computer and Communications Security10.1145/3634737.3657016(533-547)Online publication date: 1-Jul-2024
  • (2024)Trojan playground: a reinforcement learning framework for hardware Trojan insertion and detectionThe Journal of Supercomputing10.1007/s11227-024-05963-880:10(14295-14329)Online publication date: 18-Mar-2024
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      cover image ACM Conferences
      ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
      October 2022
      1467 pages
      ISBN:9781450392174
      DOI:10.1145/3508352
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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      Published: 22 December 2022

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      Author Tags

      1. ASIC
      2. VLSI
      3. hardware security
      4. hardware trojan horse
      5. manufacturing-time attack
      6. reverse engineering

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      October 30 - November 3, 2022
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      View all
      • (2025)Detection of Voltage Droop-Induced Timing Fault Attacks Due to Hardware TrojansIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.341839544:1(280-293)Online publication date: 1-Jan-2025
      • (2024)REPQC: Reverse Engineering and Backdooring Hardware Accelerators for Post-quantum CryptographyProceedings of the 19th ACM Asia Conference on Computer and Communications Security10.1145/3634737.3657016(533-547)Online publication date: 1-Jul-2024
      • (2024)Trojan playground: a reinforcement learning framework for hardware Trojan insertion and detectionThe Journal of Supercomputing10.1007/s11227-024-05963-880:10(14295-14329)Online publication date: 18-Mar-2024
      • (2023)Benchmarking Advanced Security Closure of Physical LayoutsProceedings of the 2023 International Symposium on Physical Design10.1145/3569052.3578924(256-264)Online publication date: 26-Mar-2023
      • (2023)Hardware Trojan Insertion in Finalized Layouts: From Methodology to a Silicon DemonstrationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.322384642:7(2094-2107)Online publication date: 1-Jul-2023
      • (2023)Revisiting Trojan Insertion Techniques for Post-Silicon Trojan Detection Evaluation2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI59464.2023.10238669(1-6)Online publication date: 20-Jun-2023

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