Nothing Special   »   [go: up one dir, main page]

skip to main content
research-article
Open access

The reads-from equivalence for the TSO and PSO memory models

Published: 15 October 2021 Publication History

Abstract

The verification of concurrent programs remains an open challenge due to the non-determinism in inter-process communication. One recurring algorithmic problem in this challenge is the consistency verification of concurrent executions. In particular, consistency verification under a reads-from map allows to compute the reads-from (RF) equivalence between concurrent traces, with direct applications to areas such as Stateless Model Checking (SMC). Importantly, the RF equivalence was recently shown to be coarser than the standard Mazurkiewicz equivalence, leading to impressive scalability improvements for SMC under SC (sequential consistency). However, for the relaxed memory models of TSO and PSO (total/partial store order), the algorithmic problem of deciding the RF equivalence, as well as its impact on SMC, has been elusive.
In this work we solve the algorithmic problem of consistency verification for the TSO and PSO memory models given a reads-from map, denoted VTSO-rf and VPSO-rf, respectively. For an execution of n events over k threads and d variables, we establish novel bounds that scale as nk+1 for TSO and as nk+1· min(nk2, 2k· d) for PSO. Moreover, based on our solution to these problems, we develop an SMC algorithm under TSO and PSO that uses the RF equivalence. The algorithm is exploration-optimal, in the sense that it is guaranteed to explore each class of the RF partitioning exactly once, and spends polynomial time per class when k is bounded. Finally, we implement all our algorithms in the SMC tool Nidhugg, and perform a large number of experiments over benchmarks from existing literature. Our experimental results show that our algorithms for VTSO-rf and VPSO-rf provide significant scalability improvements over standard alternatives. Moreover, when used for SMC, the RF partitioning is often much coarser than the standard Shasha-Snir partitioning for TSO/PSO, which yields a significant speedup in the model checking task.

Supplementary Material

Auxiliary Presentation Video (oopsla21main-p490-p-video.mp4)
Presentation video of the OOPSLA 2021 paper: The Reads-From Equivalence for the TSO and PSO Memory Models Truc Lam Bui, Krishnendu Chatterjee, Tushar Gautam, Andreas Pavlogiannis, and Viktor Toman

References

[1]
Parosh Abdulla, Stavros Aronis, Bengt Jonsson, and Konstantinos Sagonas. 2014. Optimal Dynamic Partial Order Reduction. POPL. https://doi.org/10.1145/2578855.2535845
[2]
Parosh Aziz Abdulla, Stavros Aronis, Mohamed Faouzi Atig, Bengt Jonsson, Carl Leonardsson, and Konstantinos Sagonas. 2015. Stateless Model Checking for TSO and PSO. In TACAS. https://doi.org/10.1007/978-3-662-46681-0_28
[3]
Parosh Aziz Abdulla, Mohamed Faouzi Atig, Bengt Jonsson, Magnus Lång, Tuan Phong Ngo, and Konstantinos Sagonas. 2019. Optimal Stateless Model Checking for Reads-from Equivalence under Sequential Consistency. Proc. ACM Program. Lang., 3, OOPSLA (2019), Article 150, Oct., 29 pages. https://doi.org/10.1145/3360576
[4]
Parosh Aziz Abdulla, Mohamed Faouzi Atig, Bengt Jonsson, and Tuan Phong Ngo. 2018. Optimal stateless model checking under the release-acquire semantics. Proc. ACM Program. Lang., 2, OOPSLA (2018), 135:1–135:29. https://doi.org/10.1145/3276505
[5]
S. V. Adve and K. Gharachorloo. 1996. Shared memory consistency models: a tutorial. Computer, 29, 12 (1996), Dec, 66–76. https://doi.org/10.1109/2.546611
[6]
Elvira Albert, Puri Arenas, María García de la Banda, Miguel Gómez-Zamalloa, and Peter J. Stuckey. 2017. Context-Sensitive Dynamic Partial Order Reduction. In Computer Aided Verification, Rupak Majumdar and Viktor Kunčak (Eds.). Springer International Publishing, Cham. 526–543. isbn:978-3-319-63387-9 https://doi.org/10.1007/978-3-319-63387-9_26
[7]
Elvira Albert, Miguel Gómez-Zamalloa, Miguel Isabel, and Albert Rubio. 2018. Constrained Dynamic Partial Order Reduction. In Computer Aided Verification, Hana Chockler and Georg Weissenbacher (Eds.). Springer International Publishing, Cham. 392–410. isbn:978-3-319-96142-2 https://doi.org/10.1007/978-3-319-96142-2_24
[8]
Jade Alglave. 2010. A Shared Memory Poetics. Ph.D. Dissertation. Paris Diderot University.
[9]
Jade Alglave, Patrick Cousot, and Caterina Urban. 2017. Concurrency with Weak Memory Models (Dagstuhl Seminar 16471). Dagstuhl Reports, 6, 11 (2017), 108–128. issn:2192-5283 https://doi.org/10.4230/DagRep.6.11.108
[10]
Stavros Aronis, Bengt Jonsson, Magnus Lång, and Konstantinos Sagonas. 2018. Optimal Dynamic Partial Order Reduction with Observers. In Tools and Algorithms for the Construction and Analysis of Systems, Dirk Beyer and Marieke Huisman (Eds.). Springer International Publishing, Cham. 229–248. isbn:978-3-319-89963-3 https://doi.org/10.1007/978-3-319-89963-3_14
[11]
Ranadeep Biswas and Constantin Enea. 2019. On the complexity of checking transactional consistency. Proc. ACM Program. Lang., 3, OOPSLA (2019), 165:1–165:28. https://doi.org/10.1145/3360591
[12]
Ahmed Bouajjani, Egor Derevenetc, and Roland Meyer. 2013. Checking and Enforcing Robustness against TSO. In Programming Languages and Systems, Matthias Felleisen and Philippa Gardner (Eds.). Springer Berlin Heidelberg, Berlin, Heidelberg. 533–553. isbn:978-3-642-37036-6 https://doi.org/10.1007/978-3-642-37036-6_29
[13]
Ahmed Bouajjani, Roland Meyer, and Eike Möhlmann. 2011. Deciding Robustness against Total Store Ordering. In Automata, Languages and Programming, Luca Aceto, Monika Henzinger, and Jiří Sgall (Eds.). Springer Berlin Heidelberg, Berlin, Heidelberg. 428–440. isbn:978-3-642-22012-8 https://doi.org/10.1007/978-3-642-22012-8_34
[14]
Truc Lam Bui, Krishnendu Chatterjee, Tushar Gautam, Andreas Pavlogiannis, and Viktor Toman. 2021. The Reads-From Equivalence for the TSO and PSO Memory Models. CoRR, abs/2011.11763 (2021), arXiv:2011.11763. arxiv:2011.11763
[15]
Harold W. Cain and Mikko H. Lipasti. 2002. Verifying Sequential Consistency Using Vector Clocks. In Proceedings of the Fourteenth Annual ACM Symposium on Parallel Algorithms and Architectures (SPAA ’02). Association for Computing Machinery, New York, NY, USA. 153–154. isbn:1581135297 https://doi.org/10.1145/564870.564897
[16]
Marek Chalupa, Krishnendu Chatterjee, Andreas Pavlogiannis, Nishant Sinha, and Kapil Vaidya. 2017. Data-centric Dynamic Partial Order Reduction. Proc. ACM Program. Lang., 2, POPL (2017), Article 31, Dec., 30 pages. issn:2475-1421 https://doi.org/10.1145/3158119
[17]
Krishnendu Chatterjee, Andreas Pavlogiannis, and Viktor Toman. 2019. Value-Centric Dynamic Partial Order Reduction. Proc. ACM Program. Lang., 3, OOPSLA (2019), Article 124, Oct., 29 pages. https://doi.org/10.1145/3360550
[18]
Y. Chen, Yi Lv, W. Hu, T. Chen, Haihua Shen, Pengyu Wang, and Hong Pan. 2009. Fast complete memory consistency verification. In 2009 IEEE 15th International Symposium on High Performance Computer Architecture. 381–392. https://doi.org/10.1109/HPCA.2009.4798276
[19]
Peter Chini and Prakash Saivasan. 2020. A Framework for Consistency Algorithms. In 40th IARCS Annual Conference on Foundations of Software Technology and Theoretical Computer Science, FSTTCS 2020, December 14-18, 2020, BITS Pilani, K K Birla Goa Campus, Goa, India (Virtual Conference), Nitin Saxena and Sunil Simon (Eds.) (LIPIcs, Vol. 182). Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 42:1–42:17. https://doi.org/10.4230/LIPIcs.FSTTCS.2020.42
[20]
E.M. Clarke, O. Grumberg, M. Minea, and D. Peled. 1999. State space reduction using partial order techniques. STTT, 2, 3 (1999), 279–287. https://doi.org/10.1007/s100090050035
[21]
Brian Demsky and Patrick Lam. 2015. SATCheck: SAT-directed Stateless Model Checking for SC and TSO. OOPSLA. ACM, New York, NY, USA. 20–36. isbn:978-1-4503-3689-5 https://doi.org/10.1145/2814270.2814297
[22]
Cormac Flanagan and Patrice Godefroid. 2005. Dynamic Partial-order Reduction for Model Checking Software. In POPL. https://doi.org/10.1145/1040305.1040315
[23]
Florian Furbach, Roland Meyer, Klaus Schneider, and Maximilian Senftleben. 2015. Memory-Model-Aware Testing: A Unified Complexity Analysis. ACM Trans. Embed. Comput. Syst., 14, 4 (2015), Article 63, Sept., 25 pages. issn:1539-9087 https://doi.org/10.1145/2753761
[24]
Phillip B. Gibbons and Ephraim Korach. 1997. Testing Shared Memories. SIAM J. Comput., 26, 4 (1997), Aug., 1208–1244. issn:0097-5397 https://doi.org/10.1137/S0097539794279614
[25]
P. Godefroid. 1996. Partial-Order Methods for the Verification of Concurrent Systems: An Approach to the State-Explosion Problem. Springer-Verlag, Secaucus, NJ, USA. https://doi.org/10.1007/3-540-60761-7
[26]
Patrice Godefroid. 1997. Model Checking for Programming Languages Using VeriSoft. In POPL. https://doi.org/10.1145/263699.263717
[27]
Patrice Godefroid. 2005. Software Model Checking: The VeriSoft Approach. FMSD, 26, 2 (2005), 77–101. https://doi.org/10.1007/s10703-005-1489-x
[28]
Maurice P. Herlihy and Jeannette M. Wing. 1990. Linearizability: A Correctness Condition for Concurrent Objects. ACM Trans. Program. Lang. Syst., 12, 3 (1990), July, 463–492. issn:0164-0925 https://doi.org/10.1145/78969.78972
[29]
W. Hu, Y. Chen, T. Chen, C. Qian, and L. Li. 2012. Linear Time Memory Consistency Verification. IEEE Trans. Comput., 61, 4 (2012), 502–516. https://doi.org/10.1109/TC.2011.41
[30]
Jeff Huang. 2015. Stateless Model Checking Concurrent Programs with Maximal Causality Reduction. In Proceedings of the 36th ACM SIGPLAN Conference on Programming Language Design and Implementation. https://doi.org/10.1145/2737924.2737975
[31]
Shiyou Huang and Jeff Huang. 2016. Maximal Causality Reduction for TSO and PSO. SIGPLAN Not., 51, 10 (2016), Oct., 447–461. issn:0362-1340 https://doi.org/10.1145/3022671.2984025
[32]
Shiyou Huang and Jeff Huang. 2017. Speeding Up Maximal Causality Reduction with Static Dependency Analysis. In 31st European Conference on Object-Oriented Programming, ECOOP 2017, June 19-23, 2017, Barcelona, Spain. 16:1–16:22. https://doi.org/10.4230/LIPIcs.ECOOP.2017.16
[33]
Vineet Kahlon, Chao Wang, and Aarti Gupta. 2009. Monotonic Partial Order Reduction: An Optimal Symbolic Partial Order Reduction Technique. In Proceedings of the 21st International Conference on Computer Aided Verification (CAV ’09). Springer-Verlag, Berlin, Heidelberg. 398–413. isbn:978-3-642-02657-7 https://doi.org/10.1007/978-3-642-02658-4_31
[34]
Dileep Kini, Umang Mathur, and Mahesh Viswanathan. 2017. Dynamic Race Prediction in Linear Time. In Proceedings of the 38th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI 2017). ACM, New York, NY, USA. 157–170. isbn:978-1-4503-4988-8 https://doi.org/10.1145/3062341.3062374
[35]
Michalis Kokologiannakis, Ori Lahav, Konstantinos Sagonas, and Viktor Vafeiadis. 2017. Effective Stateless Model Checking for C/C++ Concurrency. Proc. ACM Program. Lang., 2, POPL (2017), Article 17, Dec., 32 pages. issn:2475-1421 https://doi.org/10.1145/3158105
[36]
Michalis Kokologiannakis, Azalea Raad, and Viktor Vafeiadis. 2019. Effective Lock Handling in Stateless Model Checking. Proc. ACM Program. Lang., 3, OOPSLA (2019), Article 173, Oct., 26 pages. https://doi.org/10.1145/3360599
[37]
Michalis Kokologiannakis, Azalea Raad, and Viktor Vafeiadis. 2019. Model Checking for Weakly Consistent Libraries. In Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI 2019). ACM, New York, NY, USA. 96–110. isbn:978-1-4503-6712-7 https://doi.org/10.1145/3314221.3314609
[38]
Michalis Kokologiannakis and Viktor Vafeiadis. 2020. HMC: Model Checking for Hardware Memory Models. In ASPLOS ’20: Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, March 16-20, 2020, James R. Larus, Luis Ceze, and Karin Strauss (Eds.). ACM, 1157–1171. https://doi.org/10.1145/3373376.3378480
[39]
Ori Lahav, Viktor Vafeiadis, Jeehoon Kang, Chung-Kil Hur, and Derek Dreyer. 2017. Repairing sequential consistency in C/C++11. In Proceedings of the 38th ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2017, Barcelona, Spain, June 18-23, 2017, Albert Cohen and Martin T. Vechev (Eds.). ACM, 618–632. https://doi.org/10.1145/3062341.3062352
[40]
L. Lamport. 1979. How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs. IEEE Trans. Comput., 28, 9 (1979), 690–691. https://doi.org/10.1109/TC.1979.1675439
[41]
Magnus Lång and Konstantinos Sagonas. 2020. Parallel Graph-Based Stateless Model Checking. In Automated Technology for Verification and Analysis - 18th International Symposium, ATVA 2020, Hanoi, Vietnam, October 19-23, 2020, Proceedings, Dang Van Hung and Oleg Sokolsky (Eds.) (Lecture Notes in Computer Science, Vol. 12302). Springer, 377–393. https://doi.org/10.1007/978-3-030-59152-6_21
[42]
Tom Ball Madan Musuvathi, Shaz Qadeer. 2007. CHESS: A systematic testing tool for concurrent software.
[43]
C. Manovit and S. Hangal. 2006. Completely verifying memory consistency of test program executions. In The Twelfth International Symposium on High-Performance Computer Architecture, 2006. 166–175. https://doi.org/10.1109/HPCA.2006.1598123
[44]
Umang Mathur, Andreas Pavlogiannis, and Mahesh Viswanathan. 2020. The Complexity of Dynamic Data Race Prediction. In Proceedings of the 35th Annual ACM/IEEE Symposium on Logic in Computer Science (LICS ’20). Association for Computing Machinery, New York, NY, USA. 713–727. isbn:9781450371049 https://doi.org/10.1145/3373718.3394783
[45]
Umang Mathur, Andreas Pavlogiannis, and Mahesh Viswanathan. 2021. Optimal Prediction of Synchronization-Preserving Races. POPL. https://doi.org/10.1145/3434317
[46]
Brian Norris and Brian Demsky. 2013. CDSchecker: checking concurrent data structures written with C/C++ atomics. In OOPSLA, Antony L. Hosking, Patrick Th. Eugster, and Cristina V. Lopes (Eds.). ACM, 131–150. https://doi.org/10.1145/2509136.2509514
[47]
Scott Owens, Susmit Sarkar, and Peter Sewell. 2009. A Better x86 Memory Model: x86-TSO. In Theorem Proving in Higher Order Logics, Stefan Berghofer, Tobias Nipkow, Christian Urban, and Makarius Wenzel (Eds.). Springer Berlin Heidelberg, Berlin, Heidelberg. 391–407. isbn:978-3-642-03359-9 https://doi.org/10.1007/978-3-642-03359-9_27
[48]
Andreas Pavlogiannis. 2019. Fast, Sound, and Effectively Complete Dynamic Race Prediction. Proc. ACM Program. Lang., 4, POPL (2019), Article 17, Dec., 29 pages. https://doi.org/10.1145/3371085
[49]
Doron Peled. 1993. All from One, One for All: On Model Checking Using Representatives. In CAV. https://doi.org/10.1007/3-540-56922-7_34
[50]
Anton Podkopaev, Ori Lahav, and Viktor Vafeiadis. 2019. Bridging the gap between programming languages and hardware weak memory models. Proc. ACM Program. Lang., 3, POPL (2019), 69:1–69:31. https://doi.org/10.1145/3290382
[51]
César Rodríguez, Marcelo Sousa, Subodh Sharma, and Daniel Kroening. 2015. Unfolding-based Partial Order Reduction. In CONCUR. https://doi.org/10.4230/LIPIcs.CONCUR.2015.456
[52]
Jake Roemer, Kaan Genç, and Michael D. Bond. 2020. SmartTrack: Efficient Predictive Race Detection. In Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI 2020). Association for Computing Machinery, New York, NY, USA. 747–762. isbn:9781450376136 https://doi.org/10.1145/3385412.3385993
[53]
Peter Sewell, Susmit Sarkar, Scott Owens, Francesco Zappa Nardelli, and Magnus O. Myreen. 2010. X86-TSO: A Rigorous and Usable Programmer’s Model for x86 Multiprocessors. Commun. ACM, 53, 7 (2010), July, 89–97. issn:0001-0782 https://doi.org/10.1145/1785414.1785443
[54]
Dennis Shasha and Marc Snir. 1988. Efficient and Correct Execution of Parallel Programs That Share Memory. ACM Trans. Program. Lang. Syst., 10, 2 (1988), April, 282–312. issn:0164-0925 https://doi.org/10.1145/42190.42277
[55]
Yannis Smaragdakis, Jacob Evans, Caitlin Sadowski, Jaeheon Yi, and Cormac Flanagan. 2012. Sound Predictive Race Detection in Polynomial Time. In Proceedings of the 39th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL ’12). ACM, New York, NY, USA. 387–400. isbn:978-1-4503-1083-3 https://doi.org/10.1145/2103656.2103702
[56]
CORPORATE SPARC International, Inc. 1994. The SPARC Architecture Manual (Version 9). Prentice-Hall, Inc., Upper Saddle River, NJ, USA. isbn:0-13-099227-5
[57]
Rachid Zennou, Ahmed Bouajjani, Constantin Enea, and Mohammed Erradi. 2019. Gradual Consistency Checking. In Computer Aided Verification - 31st International Conference, CAV 2019, New York City, NY, USA, July 15-18, 2019, Proceedings, Part II, Isil Dillig and Serdar Tasiran (Eds.) (Lecture Notes in Computer Science, Vol. 11562). Springer, 267–285. https://doi.org/10.1007/978-3-030-25543-5_16
[58]
Naling Zhang, Markus Kusano, and Chao Wang. 2015. Dynamic Partial Order Reduction for Relaxed Memory Models. In PLDI. https://doi.org/10.1145/2737924.2737956

Cited By

View all
  • (2024)How Hard Is Weak-Memory Testing?Proceedings of the ACM on Programming Languages10.1145/36329088:POPL(1978-2009)Online publication date: 5-Jan-2024
  • (2024)CSSTs: A Dynamic Data Structure for Partial Orders in Concurrent Execution AnalysisProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3620666.3651358(223-238)Online publication date: 27-Apr-2024
  • (2024)Trace and Algebraic Semantics for Partial Store Order Memory Model2024 IEEE 48th Annual Computers, Software, and Applications Conference (COMPSAC)10.1109/COMPSAC61105.2024.00348(2171-2176)Online publication date: 2-Jul-2024
  • Show More Cited By

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image Proceedings of the ACM on Programming Languages
Proceedings of the ACM on Programming Languages  Volume 5, Issue OOPSLA
October 2021
2001 pages
EISSN:2475-1421
DOI:10.1145/3492349
Issue’s Table of Contents
This work is licensed under a Creative Commons Attribution International 4.0 License.

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 October 2021
Published in PACMPL Volume 5, Issue OOPSLA

Permissions

Request permissions for this article.

Check for updates

Author Tags

  1. concurrency
  2. execution-consistency verification
  3. relaxed memory models
  4. stateless model checking

Qualifiers

  • Research-article

Funding Sources

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)113
  • Downloads (Last 6 weeks)23
Reflects downloads up to 18 Nov 2024

Other Metrics

Citations

Cited By

View all
  • (2024)How Hard Is Weak-Memory Testing?Proceedings of the ACM on Programming Languages10.1145/36329088:POPL(1978-2009)Online publication date: 5-Jan-2024
  • (2024)CSSTs: A Dynamic Data Structure for Partial Orders in Concurrent Execution AnalysisProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3620666.3651358(223-238)Online publication date: 27-Apr-2024
  • (2024)Trace and Algebraic Semantics for Partial Store Order Memory Model2024 IEEE 48th Annual Computers, Software, and Applications Conference (COMPSAC)10.1109/COMPSAC61105.2024.00348(2171-2176)Online publication date: 2-Jul-2024
  • (2024)Enhancing GenMC’s Usability and PerformanceTools and Algorithms for the Construction and Analysis of Systems10.1007/978-3-031-57249-4_4(66-84)Online publication date: 6-Apr-2024
  • (2023)Optimal Reads-From Consistency Checking for C11-Style Memory ModelsProceedings of the ACM on Programming Languages10.1145/35912517:PLDI(761-785)Online publication date: 6-Jun-2023
  • (2022)Truly stateless, optimal dynamic partial order reductionProceedings of the ACM on Programming Languages10.1145/34987116:POPL(1-28)Online publication date: 12-Jan-2022

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Login options

Full Access

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media