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Accelerating neuromorphic vision algorithms for recognition

Published: 03 June 2012 Publication History

Abstract

Video analytics introduce new levels of intelligence to automated scene understanding. Neuromorphic algorithms, such as HMAX, are proposed as robust and accurate algorithms that mimic the processing in the visual cortex of the brain. HMAX, for instance, is a versatile algorithm that can be repurposed to target several visual recognition applications. This paper presents the design and evaluation of hardware accelerators for extracting visual features for universal recognition. The recognition applications include object recognition, face identification, facial expression recognition, and action recognition. These accelerators were validated on a multi-FPGA platform and significant performance enhancement and power efficiencies were demonstrated when compared to CMP and GPU platforms. Results demonstrate as much as 7.6X speedup and 12.8X more power-efficient performance when compared to those platforms.

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    cover image ACM Conferences
    DAC '12: Proceedings of the 49th Annual Design Automation Conference
    June 2012
    1357 pages
    ISBN:9781450311991
    DOI:10.1145/2228360
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 03 June 2012

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    Author Tags

    1. domain-specific acceleration
    2. heterogeneous system
    3. power efficiency
    4. recognition

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    DAC '12
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    DAC '12: The 49th Annual Design Automation Conference 2012
    June 3 - 7, 2012
    California, San Francisco

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    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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    Cited By

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    • (2020)Heterogeneous Acceleration of HAR ApplicationsIEEE Transactions on Circuits and Systems for Video Technology10.1109/TCSVT.2019.289530430:3(888-902)Online publication date: Mar-2020
    • (2020)ParaML: A Polyvalent Multicore Accelerator for Machine LearningIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.292752339:9(1764-1777)Online publication date: Sep-2020
    • (2019)An Instruction Set Architecture for Machine LearningACM Transactions on Computer Systems10.1145/333146936:3(1-35)Online publication date: 13-Aug-2019
    • (2019)HyConvIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2018.286429930:2(388-399)Online publication date: 1-Feb-2019
    • (2018)Vision-Based Passenger Activity Analysis System in Public Transport and Bus Stop Areas2018 IEEE 10th International Conference on Humanoid, Nanotechnology, Information Technology,Communication and Control, Environment and Management (HNICEM)10.1109/HNICEM.2018.8666357(1-6)Online publication date: Nov-2018
    • (2017)A survey of neural network acceleratorsFrontiers of Computer Science: Selected Publications from Chinese Universities10.1007/s11704-016-6159-111:5(746-761)Online publication date: 1-Oct-2017
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    • (2016)DianNao familyCommunications of the ACM10.1145/299686459:11(105-112)Online publication date: 28-Oct-2016
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