A novel hybrid FIFO asynchronous clock domain crossing interfacing method
Pages 271 - 274
Abstract
Multi-clock domain circuits with Clock Domain Crossing (CDC) interfaces are emerging as an alternative to circuits with a global clock. CDC interfaces are susceptible to metastability, hence their design is very challenging. This paper presents a hybrid FIFO-asynchronous method for constructing robust CDC interfaces. The proposed design can handle arbitrary clock frequency ratios between the sender and receiver with random phase shifts. The proposed design avoids latency due to synchronizers with the asynchronous protocol modifications. Circuit simulation results confirm the operation and robustness of the design at maximum workloads, and arbitrary frequency ratios, over a temperature range of -50 to 50 degrees Celsius. The interface offers a maximum throughput of 606 million transfers per second without pausing the clock.
References
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Chelcea, T., and Nowick, S. M. 2004. Robust Interfaces for Mixed-Timing Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol 12, Issue 8, 857--873.
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Dobkin, R., Ginosar, R., and Sotiriou, C.P. 2004. Data Synchronization Issues in GALS SoCs. in 10th IEEE International Symposium on Asynchronous Circuits and Systems, April 2004, 170--179.
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- A novel hybrid FIFO asynchronous clock domain crossing interfacing method
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Published In
May 2012
388 pages
ISBN:9781450312448
DOI:10.1145/2206781
- General Chairs:
- Erik Brunvard,
- Ken Stevens,
- Program Chairs:
- Joseph R. Cavallaro,
- Tong Zhang
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Published: 03 May 2012
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