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Active thread compaction for GPU path tracing

Published: 05 August 2011 Publication History

Abstract

Modern GPUs like NVidia's Fermi internally operate in a SIMD manner by ganging multiple (32) scalar threads together into SIMD warps; if a warp's threads diverge, the warp serially executes both branches, temporarily disabling threads that are not on that path. In this paper, we explore and thoroughly analyze the concept of active thread compaction---i.e., the process of taking multiple partially-filled warps and compacting them to fewer but fully utilized warps---in the context of a CUDA path tracer. Our results show that this technique can indeed lead to significant improvements in SIMD utilization, and corresponding savings in the amount of work performed; however, they also show that certain inadequacies of today's hardware wipe out most of the achieved gains, leaving bottom-up speed-ups of a mere 12--16%. We believe our analysis of why this is the case will provide insight to other researchers experimenting with this technique in different contexts.

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  • (2024)Faster Ray Tracing through Hierarchy Cut CodeComputer Graphics Forum10.1111/cgf.1522643:7Online publication date: 24-Oct-2024
  • (2022)GPU Subwarp Interleaving2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA53966.2022.00090(1184-1197)Online publication date: Apr-2022
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    cover image ACM Conferences
    HPG '11: Proceedings of the ACM SIGGRAPH Symposium on High Performance Graphics
    August 2011
    185 pages
    ISBN:9781450308960
    DOI:10.1145/2018323
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 05 August 2011

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    HPG '11: High Performance Graphics
    August 5 - 7, 2011
    British Columbia, Vancouver, Canada

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    Overall Acceptance Rate 15 of 44 submissions, 34%

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    Cited By

    View all
    • (2024)Faster Ray Tracing through Hierarchy Cut CodeComputer Graphics Forum10.1111/cgf.1522643:7Online publication date: 24-Oct-2024
    • (2022)GPU Subwarp Interleaving2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA53966.2022.00090(1184-1197)Online publication date: Apr-2022
    • (2021)Intersection Prediction for Accelerated GPU Ray TracingMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480097(709-723)Online publication date: 18-Oct-2021
    • (2021)Vulkan visionProceedings of the 2021 IEEE/ACM International Symposium on Code Generation and Optimization10.1109/CGO51591.2021.9370320(137-149)Online publication date: 27-Feb-2021
    • (2020)On Ray Reordering Techniques for Faster GPU Ray TracingSymposium on Interactive 3D Graphics and Games10.1145/3384382.3384534(1-9)Online publication date: 5-May-2020
    • (2020)Massively Parallel Rule-Based Interpreter Execution on GPUs Using Thread CompactionInternational Journal of Parallel Programming10.1007/s10766-020-00670-2Online publication date: 24-Jun-2020
    • (2018)A pipeline-based heterogeneous framework for efficient synthetic light field renderingACM SIGAPP Applied Computing Review10.1145/3212069.321207118:1(19-29)Online publication date: 30-Apr-2018
    • (2018)In-register parameter caching for dynamic neural nets with virtual persistent processor specializationProceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2018.00038(377-389)Online publication date: 20-Oct-2018
    • (2018)Exploring hidden coherency of Ray-Tracing for heterogeneous systems using online feedback methodologyThe Visual Computer: International Journal of Computer Graphics10.1007/s00371-017-1403-834:5(633-643)Online publication date: 1-May-2018
    • (2017)C++ compile time polymorphism for ray tracingProceedings of the conference on Vision, Modeling and Visualization10.2312/vmv.20171268(129-136)Online publication date: 25-Sep-2017
    • Show More Cited By

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