Article

Free access

Watermarking techniques for intellectual property protection

Authors:

W. H. Mangione-Smith,

G. WolfeAuthors Info & Claims

DAC '98: Proceedings of the 35th annual Design Automation Conference

Pages 776 - 781

https://doi.org/10.1145/277044.277240

Published: 01 May 1998 Publication History

Abstract

Digital system designs are the product of valuable effort and know-how. Their embodiments, from software and HDL program down to device-level netlist and mask data, represent carefully guarded intellectual property (IP). Hence, design methodologies based on IP reuse require new mechanisms to protect the rights of IP producers and owners. This paper establishes principles of watermarking-based IP protection, where a watermark is a mechanism for identification that is (i) nearly invisible to human and machine inspection, (ii) difficult to remove, and (iii) permanently embedded as an integral part of the design. We survey related work in cryptography and design methodology, then develop desiderata, metrics and example approaches — centering on constraint-based techniques — for watermarking at various stages of the VLSI design process.

References

[1]

W. Bender, D Gruhl, N. Morimoto and A. Lu, "Techniques for Data Hiding", IBM Svstemv Journal, 35(3-4), 1996, pp. 313-336.]]

Digital Library

[2]

J.T. Brassil, S. Low, N.F. Maxemchuk and L. O'Gorman, "Electronic Marking and Identification Techniques to Discourage Document Copying", IEEE Journal on Selected Areas in Communications, 13(4)(1995), pp. 1495-1504.]]

Digital Library

[3]

R.E. Bryant, "Binary Decision Diagrams and Beyond: Enabling Technologies for Formal Verification", Proc. of the International Conference on Computer- AidedDesign, 1995, pp. 236-243.]]

Digital Library

[4]

ST. Chakradhar, V.D. Agrawal and S.G. Rothweiler, "A Transitive Closure Algorithm for Test Generation", IEEETransactionsonComputer-AidedDesignof Integrated Circuits andSystems, 12(7) (1993), pp. 1015-28.]]

Digital Library

[5]

I.J. Cox and M.L. Miller, "A Review of Water-marking and the Importance of Perceptual Modeling", SPIE Conf.onHuman VisionandElecttoniclmaginglI, 3016(1997), pp.92-99.]]

[6]

l.J.Cox, J. Kilian, ET Leighton and T. Shamoon, "Secure Spread Spectrum Water-marking for Multimedia", Transactions on Image Processing, 6(12) (1997), pp. 1673-87.]]

Digital Library

[7]

M. Davis and H. Putnam, "A Computing Procedure for Quantification Theory", Journal of the ACM, 7(3)(1960), pp. 201-215.]]

Digital Library

[8]

S. Devadas, "Optimal Layout Via Boolean Safisfiability", IEEE International ConferenceonComputer-AidedDesign, 1989, pp. 294-7.]]

[9]

W. Diffie and M. Hellman, "New Directions in Cryptography", IEEE TransactionsonlnjormationTheory, IT-22(6),1976, pp. 644-654.]]

[10]

M.E. Garey and D. S. Johnson, Computers and Intractability: a Guide to the Theory of NP-Completeness, Freeman, 1979.]]

Digital Library

[11]

J. Giraldi and M.L. Bushnell, "Search State Equivalence for Redundancy Identification and Test Generation", Proc, Intl, TestCon/J, 1991, pp. 184-193.]]

Digital Library

[12]

M.X. Goemans and D. P. Williamson, "Improved Approximation Algorithms for Maximum Cut and Satisfiability Problems Using Semidefinite Programming'', Journal oftheACM, 42(6) (1995), pp. I 115-45.]]

Digital Library

[13]

A.H. Hashcmi, D.R. Kaeli and B. Calder, "Efficient Procedure Mapping Using Cache Line Coloring", SIGPLAN Notices, 32(5) (1997), pp. 171-182.]]

Digital Library

[14]

I. Hong and M. Potkonjak, "Behavioral Synthesis Techniques for Intellectual Property Protection", unpublished manuscript, 1997.]]

[15]

L. Honey, A.H. Tewfik and K.N. Hamdy, "Digital Watermarks for Audio Signals'', Proc. of thelnternationaIConferenceonMultimediaComputingandSysterns, 1998, pp. 473480.]]

[16]

A.B. Kahng, S. Manfik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang and G. Wolfe, "Robust IP Watermarking Methodologies for Physical Design", Proc. ACM/IEEE Design Automation Conf., 1998.]]

Digital Library

[17]

D. Kirovski and M. Potkonjak, "System-Level Synthesis of Low-Power Hard Real-Time Systems", Proc. ACM/IEEE Design Automation Conference, 1997, pp. 697-702.]]

Digital Library

[18]

J. Lach, W. H. Mangione-Smith and M. Potkonjak, "Fingerprinting Digital Circuits on Programmable Hardware", Proc. Workshop on Injormation Hiding, 1998.]]

[19]

J. Lach, W. H. Mangione-Srnith and M. Potkonjak, "FPGA Fmgerprinting Techniques for Protecting Intellectual Property", Proc. CICC, 1998.]]

[20]

T. Larrabee, "Test Pattern Generation Using Boolean Satisfiability", Proc. International Test Con/i, 1 1(1) (1992), pp,4-15.]]

[21]

S.H. Low, N.F. Maxemchuk, J.T. Brassil and L. O'Gorman, "Document Marking and Identification Using both Line and Word Shifting", Proc. INFOCOM, 1995, pp.853-60.]]

Digital Library

[22]

A.J. Menezes, P.C. van Oorschot and S.A. Vanstone, Handbook of AppliedCryptography, Boca Raton, CRC Press, 1997.]]

Digital Library

[23]

Pretty Good (tm) Privacy, Phil Zimmerman, Users Guide: Vol. 1, Vol. 2, and Internal Data Structures from Phil's Pretty Good Software, copy: http://www-atp, llal. gov/atp/papers/Hl~/ref erence s/pgp-ref s, htm]]

[24]

R.L. Rivest, "RFC 1321: the MD5 Message-Digest Algorithm", lnternet ActivitiesBoard, April 1992.]]

Digital Library

[25]

B. Selman, 'Stochastic Search and Phase Transitions: AI Meets Physics", IJCAI, 1 (1995), pp.998-1002.]]

[26]

Semiconductor Industry Association, National Technology Roadmap tor Semiconductors, revised November 1997.]]

[27]

D.R. Stinson, Cryptography: Theory and Practice, Boca Raton, CRC Press, 1995.]]

Digital Library

[28]

S. Trimberger, personalcommunication, 1997.]]

[29]

VSI Alliance, "Fall Worldwide Member Meeting: a Year of Achievement", Santa Clara, CA, October 1997.]]

[30]

H. Wang, T. Sun, Q. Yang, "Minimizing Area Cost of on-Chip Cache Memories by Caching Address Tags", IEEE Transactions on Computers, 46(11)(1997), pp. 1187-1201.]]

Digital Library

[31]

Xilinx, The Programmable Logic Data Book, Xilinx Corporation, San Jose, 1996.]]

[32]

http://~mw.rapid, org]]

[33]

http://~tmt.vsi, org]]

[34]

http://www, si2. org]]

[35]

http://dcs, ex. ac .uk/'aba/rsa/rc4. htal]]

Cited By

Zhu HLiang SHu WFangqi LJia JWang SCai JKankanhalli MPrabhakaran BBoll SSubramanian RZheng LSingh VCesar PXie LXu D(2024)Reliable Model Watermarking: Defending against Theft without Compromising on EvasionProceedings of the 32nd ACM International Conference on Multimedia10.1145/3664647.3681610(10124-10133)Online publication date: 28-Oct-2024
https://dl.acm.org/doi/10.1145/3664647.3681610
Rajendran SFarahmandi FTehranipoor M(2024)CAD Tools Pathway in Hardware Security2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)10.1109/VLSID60093.2024.00063(342-347)Online publication date: 6-Jan-2024
https://doi.org/10.1109/VLSID60093.2024.00063
Lederer IMayer RRauber A(2024)Identifying Appropriate Intellectual Property Protection Mechanisms for Machine Learning Models: A Systematization of Watermarking, Fingerprinting, Model Access, and AttacksIEEE Transactions on Neural Networks and Learning Systems10.1109/TNNLS.2023.327013535:10(13082-13100)Online publication date: Oct-2024
https://doi.org/10.1109/TNNLS.2023.3270135
Show More Cited By

Index Terms

Watermarking techniques for intellectual property protection

Recommendations

Protecting Intellectual Property of Deep Neural Networks with Watermarking
ASIACCS '18: Proceedings of the 2018 on Asia Conference on Computer and Communications Security

Deep learning technologies, which are the key components of state-of-the-art Artificial Intelligence (AI) services, have shown great success in providing human-level capabilities for a variety of tasks, such as visual analysis, speech recognition, and ...
Behavioral synthesis techniques for intellectual property protection

We introduce dynamic watermarking techniques for protecting the value of intellectual property of CAD and compilation tools and reusable design components. The essence of the new approach is the addition of a set of design and timing constraints which ...
Robust IP watermarking methodologies for physical design
DAC '98: Proceedings of the 35th annual Design Automation Conference

Increasingly popular reuse-based design paradigms create a pressing need for authorship enforcement techniques that protect the intellectual property rights of designers. We develop the first intellectual property protection protocols for embedding ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences

DAC '98: Proceedings of the 35th annual Design Automation Conference

May 1998

820 pages

ISBN:0897919645

DOI:10.1145/277044

Chairmen:
Basant R. Chawla
Lucent Technologies, Warren, NJ
,
Randal E. Bryant
Carnegie Mellon Univ., Pittsburgh, PA
,
Jan M. Rabaey
Univ. of California, Berkeley
,
Editor:
M. J. Irwin

Copyright © 1998 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS: Computer Society

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 May 1998

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Article

Conference

DAC98

Sponsor:

EDAC
SIGDA
IEEE-CS

DAC98: The 35th ACM/IEEE-CAS/EDAC Design Automation Conference

June 15 - 19, 1998

California, San Francisco, USA

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

169
Total Citations
View Citations
455
Total Downloads

Downloads (Last 12 months)198
Downloads (Last 6 weeks)28

Reflects downloads up to 23 Nov 2024

Other Metrics

View Author Metrics

Citations

Cited By

Zhu HLiang SHu WFangqi LJia JWang SCai JKankanhalli MPrabhakaran BBoll SSubramanian RZheng LSingh VCesar PXie LXu D(2024)Reliable Model Watermarking: Defending against Theft without Compromising on EvasionProceedings of the 32nd ACM International Conference on Multimedia10.1145/3664647.3681610(10124-10133)Online publication date: 28-Oct-2024
https://dl.acm.org/doi/10.1145/3664647.3681610
Rajendran SFarahmandi FTehranipoor M(2024)CAD Tools Pathway in Hardware Security2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)10.1109/VLSID60093.2024.00063(342-347)Online publication date: 6-Jan-2024
https://doi.org/10.1109/VLSID60093.2024.00063
Lederer IMayer RRauber A(2024)Identifying Appropriate Intellectual Property Protection Mechanisms for Machine Learning Models: A Systematization of Watermarking, Fingerprinting, Model Access, and AttacksIEEE Transactions on Neural Networks and Learning Systems10.1109/TNNLS.2023.327013535:10(13082-13100)Online publication date: Oct-2024
https://doi.org/10.1109/TNNLS.2023.3270135
Wang ZMa ZFeng XSun RWang HXue MBai G(2024)CORELOCKER: Neuron-level Usage Control2024 IEEE Symposium on Security and Privacy (SP)10.1109/SP54263.2024.00233(2497-2514)Online publication date: 19-May-2024
https://doi.org/10.1109/SP54263.2024.00233
Sengupta ABhui NAnshul AChourasia V(2024)Bio-mimicking DNA fingerprint profiling for HLS watermarking to counter hardware IP piracyScientific Reports10.1038/s41598-024-73119-y14:1Online publication date: 28-Sep-2024
https://doi.org/10.1038/s41598-024-73119-y
Gandhi JShekhawat DSantosh MPandey J(2024)GAN4IP: A unified GAN and logic locking-based pipeline for hardware IP securitySādhanā10.1007/s12046-024-02461-849:2Online publication date: 5-May-2024
https://doi.org/10.1007/s12046-024-02461-8
Li YZhao GHe YZhou H(2023) ObfusLock: An Efficient Obfuscated Locking Framework for Circuit IP Protection † 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE56975.2023.10136964(1-6)Online publication date: Apr-2023
https://doi.org/10.23919/DATE56975.2023.10136964
Zhang NWang KHuang K(2023)SFLL-AD: A Self-adaptive and Secure Logic LockingIEICE Electronics Express10.1587/elex.20.20230555Online publication date: 2023
https://doi.org/10.1587/elex.20.20230555
Aksoy LNguyen QAlmeida FRaik JFlottes MDupuis SPagliarini S(2023)Hybrid Protection of Digital FIR FiltersIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.325364131:6(812-825)Online publication date: Jun-2023
https://doi.org/10.1109/TVLSI.2023.3253641
Almeida FAksoy LNguyen QDupuis SFlottes MPagliarini S(2023)Resynthesis-based Attacks Against Logic Locking2023 24th International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED57927.2023.10129403(1-8)Online publication date: 5-Apr-2023
https://doi.org/10.1109/ISQED57927.2023.10129403
Show More Cited By

View Options

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

Media

Figures

Other

Tables

View Table of Contents