research-article

Complementary communication path for energy efficient on-chip optical interconnects

Authors:

Hui Li,

Sébastien Le Beux,

Yvain Thonnart,

Ian O'ConnorAuthors Info & Claims

DAC '15: Proceedings of the 52nd Annual Design Automation Conference

Article No.: 7, Pages 1 - 6

https://doi.org/10.1145/2744769.2744810

Published: 07 June 2015 Publication History

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Abstract

Optical interconnects are considered to be one of the key solutions for future generation on-chip interconnects. However, energy efficiency is mainly limited by the losses incurred by the optical signals, which considerably reduces the optical power received by the photodetectors. In this paper we propose a differential transmission of the modulated signals, which contributes to improve the transmission of the optical signal power on the receiver side. With this approach, it is possible to reduce the input laser power and increase the energy efficiency of the optical communication. The approach is generic and can be applied to SWSR-, MWSR-, SWMR- and MWMR-like architectures.

References

[1]

Aleksandr Biberman, et al. "Photonic Network-on-Chip Architectures Using Multilayer Deposited Silicon Materials for High-Performance Chip Multiprocessors," ACM Journal on Emerging Technologies in Computing Systems, 7 (2), 7:1--7:25, 2011.

Digital Library

Google Scholar

[2]

Wim Bogaerts, et al., "Silicon microring resonators," Laser&Photonics Reviews, 6(1), 47--73, 2012.

Crossref

Google Scholar

[3]

Yan Pan, John Kim and Gokhan Memik, "FlexiShare: Channel Sharing for an Energy-Efficient Nanophotonic Crossbar," In HPCA, 2010.

Google Scholar

[4]

Dana Vantrease, et al., "Corona: System Implications of Emerging Nanophotonic Technology," In ISCA, 2008.

Digital Library

Google Scholar

[5]

Xiang Zhang and Ahmed Louri, "A Multilayer Nanophotonic Interconnection Network for On-Chip Many-core Communications," In DAC, 2010.

Digital Library

Google Scholar

[6]

George Kurian, et al., "ATAC: a 1000-core cache-coherent processor with on-chip optical network," In PACT, 2010.

Digital Library

Google Scholar

[7]

Yan Pan, et al., "Firefly: Illuminating Future Network-on-Chip with Nanophotonics," In ISCA, 2009.

Digital Library

Google Scholar

[8]

Sébastien Le Beux, et al., "Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology," In DATE, 2011.

Google Scholar

[9]

Ajay Josh, et al. "Silicon-Photonic Clos Networks for Global On-Chip Communication," In NoCS, 2009.

Digital Library

Google Scholar

[10]

Sébastien Le Beux, et al., "CHAMELEON: CHANNEL Efficient Optical Network-on-Chip," In DATE, 2014.

Digital Library

Google Scholar

[11]

Xiaowen Wu, et al., "SUOR: Sectioned Undirectional Optical Ring for Chip Multiprocessor," ACM J. Emerging Technologies in Computing Systems, 2014.

Digital Library

Google Scholar

[12]

Cheng Li, et al., "LumiNOC: A Power-Efficient, High-Performance, Photonic Network-on-Chip for Future Parallel Architectures," In PACT, 2012.

Digital Library

Google Scholar

[13]

Yaoyao Ye, et al, "A Torus-Based Hierarchical Optical-Electronic Network-on-Chip for Multiprocessor System-on-Chip," ACM Journal on Emerging Technologies in Computing Systems (JETC), 8 (1), 5:1--5:26, 2012.

Digital Library

Google Scholar

[14]

Qianfan Xu, et al., "12.5 Gbit/s carrier-injection-based silicon micro-ring silicon modulators," Optics Express, 15(2), 430--436, 2007.

Crossref

Google Scholar

Cited By

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Zhao JLi HLiu F(2022)An Adaptive Routing Method Based on Fuzzy Logic System in Optical Network-on-Chip (ONoC)2022 20th International Conference on Optical Communications and Networks (ICOCN)10.1109/ICOCN55511.2022.9901217(1-3)Online publication date: 12-Aug-2022
https://doi.org/10.1109/ICOCN55511.2022.9901217
ZHAO JLi HLIU F(2022)A Fuzzy Logic System-Based Multidimensional Integrated Routing and Wavelength Assignment Method in Optical Network-on-Chip (ONoC)2022 IEEE 22nd International Conference on Communication Technology (ICCT)10.1109/ICCT56141.2022.10072477(200-205)Online publication date: 11-Nov-2022
https://doi.org/10.1109/ICCT56141.2022.10072477
El-Derhalli HLe Beux STahar S(2021)Design Space Exploration of Stochastic Computing Architectures Implemented Using Integrated OpticsIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2020.29694359:4(2158-2169)Online publication date: 1-Oct-2021
https://doi.org/10.1109/TETC.2020.2969435
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Index Terms

Complementary communication path for energy efficient on-chip optical interconnects
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Interconnection architectures

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Published In

DAC '15: Proceedings of the 52nd Annual Design Automation Conference

June 2015

1204 pages

ISBN:9781450335201

DOI:10.1145/2744769

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 07 June 2015

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DAC '15

Sponsor:

SIGDA

DAC '15: The 52nd Annual Design Automation Conference 2015

June 7 - 11, 2015

California, San Francisco

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all

Zhao JLi HLiu F(2022)An Adaptive Routing Method Based on Fuzzy Logic System in Optical Network-on-Chip (ONoC)2022 20th International Conference on Optical Communications and Networks (ICOCN)10.1109/ICOCN55511.2022.9901217(1-3)Online publication date: 12-Aug-2022
https://doi.org/10.1109/ICOCN55511.2022.9901217
ZHAO JLi HLIU F(2022)A Fuzzy Logic System-Based Multidimensional Integrated Routing and Wavelength Assignment Method in Optical Network-on-Chip (ONoC)2022 IEEE 22nd International Conference on Communication Technology (ICCT)10.1109/ICCT56141.2022.10072477(200-205)Online publication date: 11-Nov-2022
https://doi.org/10.1109/ICCT56141.2022.10072477
El-Derhalli HLe Beux STahar S(2021)Design Space Exploration of Stochastic Computing Architectures Implemented Using Integrated OpticsIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2020.29694359:4(2158-2169)Online publication date: 1-Oct-2021
https://doi.org/10.1109/TETC.2020.2969435
Zhang TLi H(2021)Exploratioin on Neural Network-Based Wavelength Assignment Method in Silicon Photonic Interconnects on Chip2021 IEEE 21st International Conference on Communication Technology (ICCT)10.1109/ICCT52962.2021.9657940(73-78)Online publication date: 13-Oct-2021
https://doi.org/10.1109/ICCT52962.2021.9657940
El-Derhalli HBeux STahar S(2020)OSCAR: An Optical Stochastic Computing AcceleRator for Polynomial Functions2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116346(1450-1455)Online publication date: Mar-2020
https://doi.org/10.23919/DATE48585.2020.9116346
Li HLiu FGu HChu ZYe X(2020)A Reliability-Aware Joint Design Method of Application Mapping and Wavelength Assignment for WDM-Based Silicon Photonic Interconnects on ChipIEEE Access10.1109/ACCESS.2020.29879288(73457-73474)Online publication date: 2020
https://doi.org/10.1109/ACCESS.2020.2987928
El-Derhalli HBeux STahar S(2019)Stochastic Computing with Integrated Optics2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8714875(1355-1360)Online publication date: Mar-2019
https://doi.org/10.23919/DATE.2019.8714875
Chang ZLi HChu ZGu HYe X(2019)Crosstalk-aware GA-based wavelength allocation method for ring-based optical network-on-chipProceedings of the ACM Turing Celebration Conference - China10.1145/3321408.3321597(1-5)Online publication date: 17-May-2019
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Li HFourmigue ALe Beux SO'Connor INicolescu G(2018)Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser TuningIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2016.25616236:3(343-356)Online publication date: 1-Jul-2018
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