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Barrier inference

Published: 21 January 1998 Publication History

Abstract

Many parallel programs are written in SPMD style i.e. by running the same sequential program on all processes. SPMD programs include synchronization, but it is easy to write incorrect synchronization patterns. We propose a system that verifies a program's synchronization pattern. We also propose language features to make the synchronization pattern more explicit and easily checked. We have implemented a prototype of our system for Split-C and successfully verified the synchronization structure of realistic programs.

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  • (2023)High-Performance GPU-to-CPU Transpilation and Optimization via High-Level Parallel ConstructsProceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3572848.3577475(119-134)Online publication date: 25-Feb-2023
  • (2021)An abstract interpretation for SPMD divergence on reducible control flow graphsProceedings of the ACM on Programming Languages10.1145/34343125:POPL(1-31)Online publication date: 4-Jan-2021
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cover image ACM Conferences
POPL '98: Proceedings of the 25th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
January 1998
403 pages
ISBN:0897919793
DOI:10.1145/268946
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 21 January 1998

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POPL98: Symposium on Principles of Programming Languages
January 19 - 21, 1998
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POPL '98 Paper Acceptance Rate 32 of 175 submissions, 18%;
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Cited By

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  • (2024)SPMD IR: Unifying SPMD and Multi-value IR Showcased for Static Verification of CollectivesRecent Advances in the Message Passing Interface10.1007/978-3-031-73370-3_1(3-20)Online publication date: 25-Sep-2024
  • (2023)High-Performance GPU-to-CPU Transpilation and Optimization via High-Level Parallel ConstructsProceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3572848.3577475(119-134)Online publication date: 25-Feb-2023
  • (2021)An abstract interpretation for SPMD divergence on reducible control flow graphsProceedings of the ACM on Programming Languages10.1145/34343125:POPL(1-31)Online publication date: 4-Jan-2021
  • (2021)On Single-Valuedness in Textually Aligned SPMD ProgramsInternational Journal of Parallel Programming10.1007/s10766-021-00710-5Online publication date: 4-May-2021
  • (2019)Safe usage of registers in BSPlibProceedings of the 34th ACM/SIGAPP Symposium on Applied Computing10.1145/3297280.3297421(1400-1407)Online publication date: 8-Apr-2019
  • (2019)Transforming non textually aligned SPMD programs into textually aligned SPMD programs by using rewriting rules2019 International Conference on High Performance Computing & Simulation (HPCS)10.1109/HPCS48598.2019.9188223(982-989)Online publication date: Jul-2019
  • (2019)Multi-valued Expression Analysis for Collective CheckingEuro-Par 2019: Parallel Processing10.1007/978-3-030-29400-7_3(29-43)Online publication date: 26-Aug-2019
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  • (2018)Textual alignment in SPMD programsProceedings of the 33rd Annual ACM Symposium on Applied Computing10.1145/3167132.3167254(1046-1053)Online publication date: 9-Apr-2018
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