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GP-SIMD Processing-in-Memory

Authors:

Ran GinosarAuthors Info & Claims

ACM Transactions on Architecture and Code Optimization (TACO), Volume 11, Issue 4

Article No.: 53, Pages 1 - 26

https://doi.org/10.1145/2686875

Published: 09 January 2015 Publication History

Abstract

GP-SIMD, a novel hybrid general-purpose SIMD computer architecture, resolves the issue of data synchronization by in-memory computing through combining data storage and massively parallel processing. GP-SIMD employs a two-dimensional access memory with modified SRAM storage cells and a bit-serial processing unit per each memory row. An analytic performance model of the GP-SIMD architecture is presented, comparing it to associative processor and to conventional SIMD architectures. Cycle-accurate simulation of four workloads supports the analytical comparison. Assuming a moderate die area, GP-SIMD architecture outperforms both the associative processor and conventional SIMD coprocessor architectures by almost an order of magnitude while consuming less power.

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Olgun ALuna JKanellopoulos KSalami BHassan HErgin OMutlu O(2022)PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAMACM Transactions on Architecture and Code Optimization10.1145/356369720:1(1-31)Online publication date: 17-Nov-2022
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Index Terms

GP-SIMD Processing-in-Memory
1. Computer systems organization
  1. Architectures
    1. Other architectures
    2. Parallel architectures
      1. Multiple instruction, multiple data

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Published In

cover image ACM Transactions on Architecture and Code Optimization

ACM Transactions on Architecture and Code Optimization Volume 11, Issue 4

January 2015

797 pages

ISSN:1544-3566

EISSN:1544-3973

DOI:10.1145/2695583

Editor:
Koen De Bosschere
Ghent University

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Copyright © 2015 ACM.

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Publication History

Published: 09 January 2015

Accepted: 01 October 2014

Revised: 01 October 2014

Received: 01 May 2014

Published in TACO Volume 11, Issue 4

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https://doi.org/10.1109/ISPASS57527.2023.00013
Denzler AOliveira GHajinazar NBera RSingh GGómez-Luna JMutlu O(2023)Casper: Accelerating Stencil Computations Using Near-Cache ProcessingIEEE Access10.1109/ACCESS.2023.325200211(22136-22154)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3252002
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https://dl.acm.org/doi/10.1145/3563697
Gebregiorgis ADu Nguyen HYu JBishnoi RTaouil MCatthoor FHamdioui S(2022)A Survey on Memory-centric Computer ArchitecturesACM Journal on Emerging Technologies in Computing Systems10.1145/354497418:4(1-50)Online publication date: 25-Oct-2022
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Yavits LKaplan RGinosar R(2022)GIRAF: General Purpose In-Storage Resistive Associative FrameworkIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2021.306544833:2(276-287)Online publication date: 1-Feb-2022
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