research-article

Transactionalizing legacy code: an experience report using GCC and Memcached

Authors:

Michael SpearAuthors Info & Claims

ACM SIGPLAN Notices, Volume 49, Issue 4

Pages 399 - 412

https://doi.org/10.1145/2644865.2541960

Published: 24 February 2014 Publication History

Abstract

The addition of transactional memory (TM) support to existing languages provides the opportunity to create new soft- ware from scratch using transactions, and also to simplify or extend legacy code by replacing existing synchronization with language-level transactions. In this paper, we describe our experiences transactionalizing the memcached application through the use of the GCC implementation of the Draft C++ TM Specification. We present experiences and recommendations that we hope will guide the effort to integrate TM into languages, and that may also contribute to the growing collective knowledge about how programmers can begin to exploit TM in existing production-quality software.

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Cited By

Litz HBraun BCheriton DZaks AMendelson BRauchwerger LHwu W(2016)EXCITE-VMProceedings of the 2016 International Conference on Parallel Architectures and Compilation10.1145/2967938.2967955(401-412)Online publication date: 11-Sep-2016
https://dl.acm.org/doi/10.1145/2967938.2967955
Abdi JPosluns GZhang GWang BJeffrey MAgrawal KPetrank E(2024)When Is Parallelism Fearless and Zero-Cost with Rust?Proceedings of the 36th ACM Symposium on Parallelism in Algorithms and Architectures10.1145/3626183.3659966(27-40)Online publication date: 17-Jun-2024
https://dl.acm.org/doi/10.1145/3626183.3659966
Sheng YHassan ASpear M(2023)Separating Mechanism from Policy in STM2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT)10.1109/PACT58117.2023.00031(279-296)Online publication date: 21-Oct-2023
https://doi.org/10.1109/PACT58117.2023.00031
Show More Cited By

Index Terms

Transactionalizing legacy code: an experience report using GCC and Memcached
1. Computing methodologies
  1. Parallel computing methodologies
    1. Parallel programming languages
2. Software and its engineering
  1. Software notations and tools
    1. General programming languages
      1. Language types
        Parallel programming languages

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Information & Contributors

Information

Published In

cover image ACM SIGPLAN Notices

ACM SIGPLAN Notices Volume 49, Issue 4

ASPLOS '14

April 2014

729 pages

ISSN:0362-1340

EISSN:1558-1160

DOI:10.1145/2644865

Editors:
Mark W. Bailey
Hamilton College, Clinton, NY
,
Rajeev Balasubramonian
University of Utah
,
Al Davis
University of Utah
,
Sarita Adve
University of Illinois at Urbana-Champ

Issue’s Table of Contents

ASPLOS '14: Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
February 2014
780 pages
ISBN:9781450323055
DOI:10.1145/2541940
General Chairs:
Rajeev Balasubramonian
University of Utah
,
Al Davis
University of Utah
,
Program Chair:
Sarita Adve
University of Illinois at Urbana-Champ

Copyright © 2014 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 24 February 2014

Published in SIGPLAN Volume 49, Issue 4

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Cited By

Litz HBraun BCheriton DZaks AMendelson BRauchwerger LHwu W(2016)EXCITE-VMProceedings of the 2016 International Conference on Parallel Architectures and Compilation10.1145/2967938.2967955(401-412)Online publication date: 11-Sep-2016
https://dl.acm.org/doi/10.1145/2967938.2967955
Abdi JPosluns GZhang GWang BJeffrey MAgrawal KPetrank E(2024)When Is Parallelism Fearless and Zero-Cost with Rust?Proceedings of the 36th ACM Symposium on Parallelism in Algorithms and Architectures10.1145/3626183.3659966(27-40)Online publication date: 17-Jun-2024
https://dl.acm.org/doi/10.1145/3626183.3659966
Sheng YHassan ASpear M(2023)Separating Mechanism from Policy in STM2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT)10.1109/PACT58117.2023.00031(279-296)Online publication date: 21-Oct-2023
https://doi.org/10.1109/PACT58117.2023.00031
Zardoshti PSpear MVosoughi ASwart G(2020)Understanding and Improving Persistent Transactions on Optane™ DC Memory2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS47924.2020.00044(348-357)Online publication date: May-2020
https://doi.org/10.1109/IPDPS47924.2020.00044
Li ZLiu LDeng YWang JLiu ZYin SWei S(2019)FPGA-Accelerated Optimistic Concurrency Control for Transactional MemoryProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358270(911-923)Online publication date: 12-Oct-2019
https://dl.acm.org/doi/10.1145/3352460.3358270
Zardoshti PZhou TBalaji PScott MSpear M(2019)Simplifying Transactional Memory Support in C++ACM Transactions on Architecture and Code Optimization10.1145/332879616:3(1-24)Online publication date: 25-Jul-2019
https://dl.acm.org/doi/10.1145/3328796
Zardoshti PZhou TLiu YSpear M(2019)Optimizing Persistent Memory TransactionsProceedings of the International Conference on Parallel Architectures and Compilation Techniques10.1109/PACT.2019.00025(219-231)Online publication date: 23-Sep-2019
https://dl.acm.org/doi/10.1109/PACT.2019.00025
Yu ZZuo YZhao Y(2019)Convoider: A Concurrency Bug Avoider Based on Transparent Software Transactional MemoryInternational Journal of Parallel Programming10.1007/s10766-019-00642-1Online publication date: 12-Sep-2019
https://doi.org/10.1007/s10766-019-00642-1
Honorio BLabegalini de Carvalho JBaldassin A(2018)On the Efficiency of Transactional Code Generation: A GCC Case Study2018 Symposium on High Performance Computing Systems (WSCAD)10.1109/WSCAD.2018.00037(184-190)Online publication date: Oct-2018
https://doi.org/10.1109/WSCAD.2018.00037
Nguyen DPingali K(2017)What Scalable Programs Need from Transactional MemoryACM SIGARCH Computer Architecture News10.1145/3093337.303775045:1(105-118)Online publication date: 4-Apr-2017
https://dl.acm.org/doi/10.1145/3093337.3037750
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