Thirty-four undergraduates implemented a MIPS R2000 processor for an introductory CMOS VLSI design course. This included designing a microarchitecture in Verilog, developing custom PLA generation and ad-hoc random testing tools, creating a standard cell library, schematics, layout, and PCB test board. The processor was fabricated by MOSIS on an AMI 0.5-micron process, included 160,000 transistors, and ran at 7.25 MHz.

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Waugaman MDavidson ZDietrich SJohnson DMeyer CStorm EThaker AWong I(2016)LEG processor for education2016 11th European Workshop on Microelectronics Education (EWME)10.1109/EWME.2016.7496467(1-5)Online publication date: May-2016
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Casu MMantovani P(2015)A synchronous latency-insensitive RISC for better than worst-case designIntegration, the VLSI Journal10.1016/j.vlsi.2014.01.00348:C(72-82)Online publication date: 1-Jan-2015
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Quinn HBlack DRobinson WBuchner S(2013)Fault Simulation and Emulation Tools to Augment Radiation-Hardness Assurance TestingIEEE Transactions on Nuclear Science10.1109/TNS.2013.225950360:3(2119-2142)Online publication date: Jun-2013
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Index Terms

A MIPS R2000 implementation
1. Applied computing
  1. Computers in other domains
    1. Personal computers and PC applications
      1. Microcomputers

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DAC '08: Proceedings of the 45th annual Design Automation Conference

June 2008

993 pages

ISBN:9781605581156

DOI:10.1145/1391469

General Chair:
Limor Fix
Intel Research Pittsburgh, Pittsburgh, PA

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https://doi.org/10.1109/EWME.2016.7496467
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Wang HGao XChen YTang DHu WCheung PWawrzynek J(2010)A multi-FPGA based platform for emulating a 100m-transistor-scale processor with high-speed peripherals (abstract only)Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1723112.1723160(283-283)Online publication date: 21-Feb-2010
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