Article

Endurance enhancement of flash-memory storage systems: an efficient static wear leveling design

Authors:

Yuan-Hao Chang,

Tei-Wei KuoAuthors Info & Claims

DAC '07: Proceedings of the 44th annual Design Automation Conference

Pages 212 - 217

https://doi.org/10.1145/1278480.1278533

Published: 04 June 2007 Publication History

Abstract

This work is motivated by the strong demand of reliability enhancement over flash memory. Our objective is to improve the endurance of flash memory with limited overhead and without many modifications to popular implementation designs, such as Flash Translation Layer protocol (FTL) and NAND Flash Translation Layer protocol (NFTL). A static wear leveling mechanism is proposed with limited memory-space requirements and an efficient implementation. The propreties of the mechanism are then explored with various implementation considerations. Through a series of experiments based on a realistic trace, we show that the endurance of FTL and NFTL could be significantly improved with limited system overheads.

References

[1]

Flash Cache Memory Puts Robson in the Middle. Intel.

[2]

Flash File System. US Patent 540,448. In Intel Corporation.

[3]

FTL Logger Exchanging Data with FTL Systems. Technical report, Intel Corporation.

[4]

Flash-memory Translation Layer for NAND flash (NFTL). M-Systems, 1998.

[5]

Understanding the Flash Translation Layer (FTL) Specification, http://developer.intel.com/.Technical report, Intel Corporation, Dec 1998.

[6]

Hybrid Hard Drives with Non-Volatile Flash and Longhorn. Microsoft Corporation, 2005.

[7]

Increasing Flash Solid State Disk Reliability. Technical report, SiliconSystems, Apr 2005.

[8]

NAND08Gx3C2A 8Gbit Multi-level NAND Flash Memory. STM icroelectronics, 2005.

[9]

Windows Ready Drive and Hybrid Hard Disk Drives, http://www.microsoft.com/whdc/device/storage/hybrid.mspx. Technical report, Microsoft, May 2006.

[10]

A. Ban. Wear leveling of static areas in flash memory. US Patent 6,732,221. M-systems, May 2004.

[11]

L.-P. Chang and T.-W. Kuo. An Adaptive Striping Architecture for Flash Memory Storage Systems of Embedded Systems. In IEEE Real-Time and Embedded Technology and Applications Symposium, pages 187--196, 2002.

Digital Library

[12]

L.-P. Chang and T.-W. Kuo. An Efficient Management Scheme for Large-Scale Flash-Memory Storage Systems. In ACM Symposium on Applied Computing (SAC), pages 862--868, Mar 2004.

Digital Library

[13]

M.-L. Chiang, P. C. H. Lee, and R.-C. Chang. Using data clustering to improve cleaning performance for flash memory. Software: Practice and Experience, 29--3:267--290, May 1999.

Digital Library

[14]

J.-W. Hsieh, L.-P. Chang, and T.-W. Kuo. Efficient On-Line Identification of Hot Data for Flash-Memory Management. In Proceedings of the 2005 ACM symposium on Applied computing, pages 838--842, Mar 2005.

Digital Library

[15]

J. C. Sheng-Jie Syu. An Active Space Recycling Mechanism for Flash Storage Systems in Real-Time Application Environment. 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Application (RTCSA'05), pages 53--59, 2005.

Digital Library

[16]

D. Shmidt. Technical note: Trueffs wear-leveling mechanism (tn-doc-017). Technical report, M-System, 2002.

[17]

C.-H. Wu and T.-W. Kuo. An Adaptive Two-Level Management for the Flash Translation Layer in Embedded Systems. In IEEE/ACM 2006 International Conference on Computer-Aided Design (ICCAD), November 2006.

Digital Library

[18]

K. S. Yim, H. Bahn, and K. Koh. A Flash Compression Layer for SmartMedia Card Systems. IEEE Transactions on Consumer Electronics, 50(1): 192--197, Feburary 2004.

Digital Library

Cited By

Jayaram RWoodruff DZhou S(2024)Streaming Algorithms with Few State ChangesProceedings of the ACM on Management of Data10.1145/36511452:2(1-28)Online publication date: 14-May-2024
https://dl.acm.org/doi/10.1145/3651145
Tseng SChen TYang M(2024)Are Superpages Super-fast? Distilling Flash Blocks to Unify Flash Pages of a Superpage in an SSD2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00055(630-642)Online publication date: 2-Mar-2024
https://doi.org/10.1109/HPCA57654.2024.00055
Zhang RZhou LLi MTan YYang C(2024)Efficient wear-leveling-aware data placement for LSM-Tree based key-value store on ZNS SSDsJournal of King Saud University - Computer and Information Sciences10.1016/j.jksuci.2024.102156(102156)Online publication date: Aug-2024
https://doi.org/10.1016/j.jksuci.2024.102156
Show More Cited By

Index Terms

Endurance enhancement of flash-memory storage systems: an efficient static wear leveling design
1. Information systems
  1. Information storage systems
    1. Storage management
2. Software and its engineering
  1. Software organization and properties
    1. Contextual software domains
      1. Operating systems
        File systems management
        Memory management

Recommendations

A group-based wear-leveling algorithm for large-capacity flash memory storage systems
CASES '07: Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems

Although NAND flash memory has become one of the most popular storage media for portable devices, it has a serious problem with respect to lifetime. Each block of NAND flash memory has a limited number of program/erase cycles, usually 10,000-100,000, ...
Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling
MICRO 42: Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture

Phase Change Memory (PCM) is an emerging memory technology that can increase main memory capacity in a cost-effective and power-efficient manner. However, PCM cells can endure only a maximum of 10⁷ - 10⁸ writes, making a PCM based system have a lifetime ...
On Trading Wear-leveling with Heal-leveling
DAC '14: Proceedings of the 51st Annual Design Automation Conference

Manufacturers are constantly seeking to increase flash memory density in order to fulfill the ever growing demand for storage capacity. However, this trend significantly reduces the reliability and endurance of flash memory chips. The lifetime ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences

DAC '07: Proceedings of the 44th annual Design Automation Conference

June 2007

1016 pages

ISBN:9781595936271

DOI:10.1145/1278480

General Chair:
Steven P. Levitan
Univ. of Pittsburgh, Pittsburgh, PA

Copyright © 2007 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

The EDA Consortium
IEEE/CASS/CANDE/CEDA
SIGDA: ACM Special Interest Group on Design Automation

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 04 June 2007

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Article

Conference

DAC07

Sponsor:

SIGDA

DAC07: The 44th Annual Design Automation Conference 2007

June 4 - 8, 2007

California, San Diego

Acceptance Rates

DAC '07 Paper Acceptance Rate 152 of 659 submissions, 23%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

141
Total Citations
View Citations
1,604
Total Downloads

Downloads (Last 12 months)60
Downloads (Last 6 weeks)7

Reflects downloads up to 30 Nov 2024

Other Metrics

View Author Metrics

Citations

Cited By

Jayaram RWoodruff DZhou S(2024)Streaming Algorithms with Few State ChangesProceedings of the ACM on Management of Data10.1145/36511452:2(1-28)Online publication date: 14-May-2024
https://dl.acm.org/doi/10.1145/3651145
Tseng SChen TYang M(2024)Are Superpages Super-fast? Distilling Flash Blocks to Unify Flash Pages of a Superpage in an SSD2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00055(630-642)Online publication date: 2-Mar-2024
https://doi.org/10.1109/HPCA57654.2024.00055
Zhang RZhou LLi MTan YYang C(2024)Efficient wear-leveling-aware data placement for LSM-Tree based key-value store on ZNS SSDsJournal of King Saud University - Computer and Information Sciences10.1016/j.jksuci.2024.102156(102156)Online publication date: Aug-2024
https://doi.org/10.1016/j.jksuci.2024.102156
Tannu SNair P(2023)The Dirty Secret of SSDs: Embodied CarbonACM SIGEnergy Energy Informatics Review10.1145/3630614.36306163:3(4-9)Online publication date: 25-Oct-2023
https://dl.acm.org/doi/10.1145/3630614.3630616
Long LHuang JGao CLiu DLiu RJiang Y(2023)ADAR: Application-Specific Data Allocation and Reprogramming Optimization for 3-D TLC Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321039042:6(1824-1837)Online publication date: Jun-2023
https://doi.org/10.1109/TCAD.2022.3210390
Lin YLo CShih YChen T(2023)Alleviating the Impact of Fingerprint Operations on NAND Flash Memory Storage Performance2023 20th International SoC Design Conference (ISOCC)10.1109/ISOCC59558.2023.10395987(249-250)Online publication date: 25-Oct-2023
https://doi.org/10.1109/ISOCC59558.2023.10395987
Gao CYe MXue CZhang YShi LShu JYang J(2022)Reprogramming 3D TLC Flash Memory based Solid State DrivesACM Transactions on Storage10.1145/348706418:1(1-33)Online publication date: 29-Jan-2022
https://dl.acm.org/doi/10.1145/3487064
Zhang WDong ZZhu Y(2022)EddySuperblock: Improving NAND Flash Efficiency and Lifetime by Endurance-Driven Dynamic Superblock ManagementIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2021.312686230:1(95-107)Online publication date: Jan-2022
https://doi.org/10.1109/TVLSI.2021.3126862
Hu HWang WChang YLee YLin BWang HLin YHuang YLee CSu THsieh CHu CLai YChen CChen HLi HKuo TChang MWang KHung CLu C(2022)ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO56248.2022.00058(763-783)Online publication date: Oct-2022
https://doi.org/10.1109/MICRO56248.2022.00058
Kim HHwang ILee JYeom HSung H(2022)Concurrent and Robust End-to-End Data Integrity Verification Scheme for Flash-Based Storage DevicesIEEE Access10.1109/ACCESS.2022.316372910(36350-36361)Online publication date: 2022
https://doi.org/10.1109/ACCESS.2022.3163729
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Table of Contents