Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/127601.127656acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
Article
Free access

A framework for satisfying input and output encoding constraints

Published: 01 June 1991 Publication History
First page of PDF

References

[1]
R. Brayton, G. Hachtel, C. McMullen, and A. Sangiovanni- Vincentelli. Logic Minimization Algorithms for VLSI Synthesis. Kluwer Academic Publishers, 1984.
[2]
G. DeMicheli. Symbolic design of combinational and sequential logic circuits implemented by two-level logic macros. IEEE Transactions on Computer-Aided Design, October 1986.
[3]
G. DeMicheli, R. Brayton, and A. Sangiovanni-Vincentelli. Optimal state assignment for finite state machines. IEEE Transactions on Computer-Aided Design, July 1985.
[4]
S. Devadas and R. Newton. Exact algorithms for output encoding, state assignment and four-level Boolean minimization. IEEE Transactions on Computer-Aided Design, January 199 I.
[5]
L. Lavagno, S. Malik, R. Brayton, and A. Sangiovanni- Vincentelli. MIS-MV: Optimization of multi-level logic with multiple valued inputs. In The Proceedings of the International Conference on Computer-Aided Design, November 1990.
[6]
M. Marcus. Derivation of maximal compatibles using Boolean algebra. IBM Journal of Research and Development, November 1964.
[7]
A. Saldanha and S. Chandra. Synthesis for improved sequential controllability. Submitted to International Fault Tolerant Computing Conference, November 1990.
[8]
A. Saldanha, T. Villa, R. Brayton, and A. Sangiovanni- Vincentelli. A uniform framework for satisfying input and output encoding constraints. Submitted for publication, IEEE Transactions on Computer-Aided Design, March 1991.
[9]
J. Tracey. Internal state assignment for asynchronous sequential machines. IRE Transactions on Electronic Computers, August 1966.
[10]
T. Villa and A. Sangiovanni-Vincentelli. NOVA: State assignment for optimal two-level logic implementations. In IEEE Transactions on Computer-Aided Design, September 1990.
[11]
S. Yang and M. Ciesielski. Optimum and suboptimum algorithms for input encoding and its relationship to logic minimization. 1EEE Transactions on Computer-Aided Design, January 1991.

Cited By

View all
  • (2009)Soft-error tolerance and mitigation in asynchronous burst-mode circuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.201438117:7(869-882)Online publication date: 1-Jul-2009
  • (2008)Coping with Soft Errors in Asynchronous Burst-Mode MachinesProceedings of the 2008 14th IEEE International Symposium on Asynchronous Circuits and Systems10.1109/ASYNC.2008.15(151-160)Online publication date: 7-Apr-2008
  • (2007)Concurrent Error Detection Methods for Asynchronous Burst-Mode MachinesIEEE Transactions on Computers10.1109/TC.2007.102556:6(785-798)Online publication date: 1-Jun-2007
  • Show More Cited By

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences
DAC '91: Proceedings of the 28th ACM/IEEE Design Automation Conference
June 1991
783 pages
ISBN:0897913957
DOI:10.1145/127601
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 1991

Permissions

Request permissions for this article.

Check for updates

Qualifiers

  • Article

Conference

DAC91
Sponsor:
DAC91: The 28th ACM/IEEE Design Automation Conference
June 17 - 22, 1991
California, San Francisco, USA

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25
62nd ACM/IEEE Design Automation Conference
June 22 - 26, 2025
San Francisco , CA , USA

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)77
  • Downloads (Last 6 weeks)6
Reflects downloads up to 17 Nov 2024

Other Metrics

Citations

Cited By

View all
  • (2009)Soft-error tolerance and mitigation in asynchronous burst-mode circuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.201438117:7(869-882)Online publication date: 1-Jul-2009
  • (2008)Coping with Soft Errors in Asynchronous Burst-Mode MachinesProceedings of the 2008 14th IEEE International Symposium on Asynchronous Circuits and Systems10.1109/ASYNC.2008.15(151-160)Online publication date: 7-Apr-2008
  • (2007)Concurrent Error Detection Methods for Asynchronous Burst-Mode MachinesIEEE Transactions on Computers10.1109/TC.2007.102556:6(785-798)Online publication date: 1-Jun-2007
  • (2006)Explicit and implicit algorithms for binate covering problemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.64403016:7(677-691)Online publication date: 1-Nov-2006
  • (2006)Implicit computation of compatible sets for state minimization of ISFSMsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.64402916:7(657-676)Online publication date: 1-Nov-2006
  • (2006)An efficient heuristic procedure for solving the state assignment problem for event-based specificationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.36312414:1(45-60)Online publication date: 1-Nov-2006
  • (2006)An efficient algorithm for constrained encoding and its applicationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.25114512:12(1813-1826)Online publication date: 1-Nov-2006
  • (2006)STOICIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.23860512:8(1123-1131)Online publication date: 1-Nov-2006
  • (2006)Symbolic minimization of multilevel logic and the input encoding problemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.14484711:7(825-843)Online publication date: 1-Nov-2006
  • (2003)XBM2PLAProceedings of the conference on Design, Automation and Test in Europe - Volume 110.5555/789083.1022868Online publication date: 3-Mar-2003
  • Show More Cited By

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Login options

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media