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Fault tolerant quantum cellular array (QCA) design using Triple Modular Redundancy with shifted operands

Published: 18 January 2005 Publication History

Abstract

Due to their extremely small feature sizes and ultra low power consumption, Quantum-dot Cellular Automata (QCA) technology is projected to be a promising nanotechnology. However, in nanotechnologies, manufacture time defect levels and operational time fault rates are expected to be quite high. Straightforward Triple Modular Redundancy (TMR) based fault tolerance is inappropriate for QCA nanotechnology since wire delays dominate the logic delays and faults in wires dominate the faults in a QCA based design. Furthermore, long wires are necessary in TMR based designs. In this paper we show that fault-tolerance can be obtained by using TMR with Shifted Operands (TMRSO). TMRSO uses shorter wires of QCA cells and exploits the self-latching property of clocked QCA arrays to provide the same level of fault tolerance capability as straightforward TMR while being significantly faster and smaller. This technique can be applied to a variety of operations; we have validated TMRSO on adders. Implementation results obtained using QCADesigner [6] show that an 8-bit adder using TMRSO has more than 50% area reduction and more than 100% throughput improvement when compared to a TMR implementation.

References

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C. S. Lent, P. D. Tougaw, W. Porod, G. H. Bernstein, "Quantum cellular automata," Nanotechnology, vol. 4, pp. 49--57, 1993.
[2]
P. D. Tougaw, C. S. Lent, "Logical devices implemented using quantum cellular automata", Journal of Applied Physics, vol. 75(3), pp. 1818--1825, February 1, 1994.
[3]
A. Vetteth, K. Walus, V. S. Dimitrov, G. A. Jullien, "Quantum-dot cellular automata carry-look-ahead adder and barrel shifter", IEEE Emerging Telecommunications Technologies Conference, 2-I-4 (5 pages), Dallas, TX, Sept. 2002.
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W. Wang, K. Walus, G. A. Jullien, "Quantum-Dot Cellular Automata Adders", IEEE Nano 2003 Conference, pp. 461--464, San Francisco, CA 2003.
[5]
M. B. Tahoori, M. Momenzadeh, J. Huang, F. Lombardi, "Defects and Faults in Quantum Cellular Automata at Nano Scale", VLSI Test Symposium, p.291, 2004.
[6]
QCADesigner, http://www.atips.ca/projects/qcadesigner/
[7]
J. H. Patel, L. Y. Fung, "Concurrent Error Detection in ALUs by Recomputing with Shifted Operands," IEEE Transactions on Computer, Vol. C.31, No.7, pp. 589--595, Jul. 1982.
[8]
A. Fijany, N. Toomarian, K. Modarress, M. Spotnitz, "Bit-serial Adder Based on Quantum Dots", NASA technical report, NPO-20869, Jan. 2003.
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M. B. Tahoori, F. Lombardi, "Testing of Quantum Dot Cellular Automata Based Designs", Design Automation and Test in Europe Conference, pp. 1408--1409, 2004.
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A. Fijany, B. N. Toomarian, "New Design for Quantum Dots Cellular Automata to Obtain Fault Tolerant Logic Gates", Journal of Nanoparticle Research, vol. 3, pp. 27--37, Feb. 2001.
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Craig S. Lent, P. Douglas Tougaw, "A Device Architecture for Computing with Quantum Dots", Proceedings of The IEEE, Vol. 85, NO.4, pp541--557, April 1997

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  1. Fault tolerant quantum cellular array (QCA) design using Triple Modular Redundancy with shifted operands

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      cover image ACM Conferences
      ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference
      January 2005
      1495 pages
      ISBN:0780387376
      DOI:10.1145/1120725
      • General Chair:
      • Ting-Ao Tang
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 18 January 2005

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      View all
      • (2023)Fault modeling for external energy or internal cell defect in quantum dot cellular automataMicroprocessors and Microsystems10.1016/j.micpro.2023.104948103(104948)Online publication date: Nov-2023
      • (2021)Design and Analysis of Fault-Tolerant 1:2 Demultiplexer Using Quantum-Dot Cellular Automata Nano-TechnologyElectronics10.3390/electronics1021256510:21(2565)Online publication date: 20-Oct-2021
      • (2016)On the reliability of majority logic structure in quantum-dot cellular automataMicroelectronics Journal10.1016/j.mejo.2015.11.00247(7-18)Online publication date: Jan-2016
      • (2016)Design and analysis of new fault-tolerant majority gate for quantum-dot cellular automataJournal of Computational Electronics10.1007/s10825-016-0918-y15:4(1484-1497)Online publication date: 1-Dec-2016
      • (2016)Towards the design of hybrid QCA tiles targeting high fault toleranceJournal of Computational Electronics10.1007/s10825-015-0760-715:2(429-445)Online publication date: 1-Jun-2016
      • (2014)Reversible Logic Based Design and Test of Field Coupled Nanocomputing CircuitsField-Coupled Nanocomputing10.1007/978-3-662-45908-9_7(133-172)Online publication date: 1-Jun-2014
      • (2014)Reversible Logic Based Design and Test of Field Coupled Nanocomputing CircuitsField-Coupled Nanocomputing10.1007/978-3-662-43722-3_7(133-172)Online publication date: 1-Jun-2014
      • (2013)Defect and Temperature Effects on Complex Quantum-Dot Cellular Automata DevicesJournal of Applied Mathematics and Physics10.4236/jamp.2013.1300301:03(7-15)Online publication date: 2013
      • (2012)The fault-tolerance study of QCA adder based on probability modelActa Physica Sinica10.7498/aps.61.05020261:5(050202)Online publication date: 2012
      • (2010)An information-theoretic analysis of quantum-dot cellular automata for defect toleranceACM Journal on Emerging Technologies in Computing Systems10.1145/1777401.17774026:3(1-19)Online publication date: 13-Aug-2010

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