Cited By
View all- Syamala YTilak ASrilakshmi KAnil C(2018)Low Power Testable Reversible Combinational Circuits2018 Second International Conference on Intelligent Computing and Control Systems (ICICCS)10.1109/ICCONS.2018.8663240(1485-1489)Online publication date: Jun-2018
- Bajidbi SRukmini MRatna Babu Y(2015)Implementation of Reversible Arithmetic and Logical Unit and Its BILBO TestingMicroelectronics, Electromagnetics and Telecommunications10.1007/978-81-322-2728-1_57(601-613)Online publication date: 25-Dec-2015
- Syamala YTilak ASrilakshmi K(2012)Testing of Reversible Combinational CircuitsAdvances in Communication, Network, and Computing10.1007/978-3-642-35615-5_7(46-53)Online publication date: 2012