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Gordon: using flash memory to build fast, power-efficient clusters for data-intensive applications

Published: 07 March 2009 Publication History

Abstract

As our society becomes more information-driven, we have begun to amass data at an astounding and accelerating rate. At the same time, power concerns have made it difficult to bring the necessary processing power to bear on querying, processing, and understanding this data. We describe Gordon, a system architecture for data-centric applications that combines low-power processors, flash memory, and data-centric programming systems to improve performance for data-centric applications while reducing power consumption. The paper presents an exhaustive analysis of the design space of Gordon systems, focusing on the trade-offs between power, energy, and performance that Gordon must make. It analyzes the impact of flash-storage and the Gordon architecture on the performance and power efficiency of data-centric applications. It also describes a novel flash translation layer tailored to data intensive workloads and large flash storage arrays. Our data show that, using technologies available in the near future, Gordon systems can out-perform disk-based clusters by 1.5× and deliver up to 2.5× more performance per Watt.

References

[1]
http://hadoop.apache.org/core/.
[2]
http://www.fusionio.com/.
[3]
http://xtreview.com/addcomment-id-4801-view-Intel-atom-1.6-Ghzbenchmark. html.
[4]
http://laptoping.com/intel-atom-benchmark.html.
[5]
http://www.vmware.com/.
[6]
DRAMeXchange. http://www.dramexchange.com/.
[7]
Open nand flash interface specification 1.0. http://www.onfi.org/documentation.html.
[8]
Open nand flash interface specification 2.0. http://www.onfi.org/documentation.html.
[9]
Samsung k9f8g08uxm flash memory datasheet.
[10]
Samsung debuts 64gbit mlc nand flash memory. EE Times Asia, October 2007. http://www.eetasia.com/ART 8800485916 499486 NP 11c4687c.HTM.
[11]
New intel centrino atom processor technology ushers in 'best internet experience in your pocket', 2008. Intel Press release.
[12]
N. Agrawal, V. Prabhakaran, T. Wobber, J. D. Davis, M. Manasse, and R. Panigrahy. Design tradeoffs for ssd performance. June 2008.
[13]
A. Birrell, M. Isard, C. Thacker, and T. Wobber. A design for high-performance flash disks. Technical Report MSR-TR-2005-176, Microsoft Research, December 2005.
[14]
L.-P. Chang. On efficient wear leveling for large-scale flash-memory storage systems. In SAC '07: Proceedings of the 2007 ACM symposium on Applied computing, pages 1126--1130, New York, NY, USA, 2007. ACM.
[15]
H. chih Yang, A. Dasdan, R.-L. Hsiao, and D. S. Parker. Map-reducemerge: simplified relational data processing on large clusters. In SIGMOD '07: Proceedings of the 2007 ACM SIGMOD international conference on Management of data, pages 1029--1040, New York, NY, USA, 2007. ACM.
[16]
C. T. Chu, S. K. Kim, Y. A. Lin, Y. Yu, G. R. Bradski, A. Y. Ng, and K. Olukotun. Map-reduce for machine learning on multicore. In B. Schölkopf, J. C. Platt, and T. Hoffman, editors, NIPS, pages 281--288. MIT Press, 2006.
[17]
J. Dean and S. Ghemawat. Mapreduce: simplified data processing on large clusters. In OSDI'04: Proceedings of the 6th conference on Symposium on Opearting Systems Design & Implementation, pages 10--10, Berkeley, CA, USA, 2004. USENIX Association.
[18]
D. DeWitt and J. Gray. Parallel database systems: the future of high performance database systems. Commun. ACM, 35(6):85--98, 1992.
[19]
D. J. Dewitt, S. Ghandeharizadeh, D. A. Schneider, A. Bricker, H. I. Hsiao, and R. Rasmussen. The gamma database machine project. IEEE Trans. on Knowl. and Data Eng., 2(1):44--62, 1990.
[20]
D. Economou, S. Rivoire, C. Kozyrakis, and P. Ranganathan. Fullsystem power analysis and modeling for server environments. June 2006.
[21]
X. Fan, W.-D. Weber, and L. A. Barroso. Power provisioning for a warehouse-sized computer. In ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture, pages 13--23, New York, NY, USA, 2007. ACM.
[22]
Y. Fukuzumi, Y. Matsuoka, M. Kito, M. Kido, M. Sato, H. Tanaka, Y. Nagata, Y. Iwata, H. Aochi, and A. Nitayama. Optimal integration and characteristics of vertical array devices for ultra-high density, bitcost scalable flash memory. Electron Devices Meeting, 2007. IEDM 2007. IEEE International, pages 449--452, 10-12 Dec. 2007.
[23]
G. Ganger, B. Worthington, and Y. Patt. Disksim. http://www.pdl.cmu.edu/DiskSim/.
[24]
S. Ghemawat, H. Gobioff, and S.-T. Leung. The google file system. SIGOPS Oper. Syst. Rev., 37(5):29--43, 2003.
[25]
G. Graefe. Encapsulation of parallelism in the volcano query processing system. SIGMOD Rec., 19(2):102--111, 1990.
[26]
T. R. Halfhill. Intel's tiny atom. Microprocssor Report, April 2008.
[27]
A. Huffman. Onfi: Leading the way to higher performance. http://www.onfi.org/docs/ComputexDRAMeXchange.pdf.
[28]
Intel. Increasing data center density while driving down power and cooling costs, June 2006. White paper.
[29]
Intel. Quad-core intel xeon processor 3200 series datasheet, 2007.
[30]
Intel. Intel system controller hub datasheet, 2008. http://download.intel.com/design/chipsets/embedded/datashts/319537.pdf.
[31]
M. Isard, M. Budiu, Y. Yu, A. Birrell, and D. Fetterly. Dryad: distributed data-parallel programs from sequential building blocks. SIGOPS Oper. Syst. Rev., 41(3):59--72, 2007.
[32]
D. Jung, Y.-H. Chae, H. Jo, J.-S. Kim, and J. Lee. A group-based wear-leveling algorithm for large-capacity flash memory storage systems. In CASES '07: Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, pages 160--164, New York, NY, USA, 2007. ACM.
[33]
S.-M. Jung, J. Jang, W. Cho, H. Cho, J. Jeong, Y. Chang, J. Kim, Y. Rah, Y. Son, J. Park, M.-S. Song, K.-H. Kim, J.-S. Lim, and K. Kim. Three dimensionally stacked nand flash memory technology using stacking single crystal si layers on ild and tanos structure for beyond 30nm node. Electron Devices Meeting, 2006. IEDM '06. International, pages 1--4, 11-13 Dec. 2006.
[34]
D. Kwak, J. Park, K. Kim, Y. Yim, S. Ahn, Y. Park, J. Kim, W. Jeong, J. Kim, M. Park, B. Yoo, S. Song, H. Kim, J. Sim, S. Kwon, B. Hwang, H. kyu Park, S. Kim, Y. Lee, H. Shin, N. Yim, K. Lee, M. Kim, Y. Lee, J. Park, S. Park, J. Jung, and K. Kim. Integration technology of 30nm generation multi-level nand flash for 64gb nand flash memory. VLSI Technology, 2007 IEEE Symposium on, pages 12--13, 12-14 June 2007.
[35]
A. W. McNabb, C. K. Monson, and K. D. Seppi. Mrpso: Mapreduce particle swarm optimization. In GECCO '07: Proceedings of the 9th annual conference on Genetic and evolutionary computation, pages 177--177, New York, NY, USA, 2007. ACM.
[36]
Micron. Micron ddr3 sdram mt41j256m8 datasheet rev'd, 2008. http://download.micron.com/pdf/datasheets/dram/ddr3/2Gb DDR3 SDRAM.pdf.
[37]
Y. Park, J. Choi, C. Kang, C. Lee, Y. Shin, B. Choi, J. Kim, S. Jeon, J. Sel, J. Park, K. Choi, T. Yoo, J. Sim, and K. Kim. Highly manufacturable 32gb multi-level nand flash memory with 0.0098 μ2 cell size using tanos(si - oxide - al2o3 - tan) cell technology. Electron Devices Meeting, 2006. IEDM '06. International, pages 1--4, 11-13 Dec. 2006.
[38]
C. Ranger, R. Raghuraman, A. Penmetsa, G. Bradski, and C. Kozyrakis. Evaluating mapreduce for multi-core and multiprocessor systems. In HPCA '07: Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture, pages 13--24, Washington, DC, USA, 2007. IEEE Computer Society.
[39]
R. Schuetz, H. Oh, J.-K. Kim, H.-B. Pyeon, S. Przybylski, and P. Gillingham. Hyperlink nand flash architecture for mass storage applications. Non-Volatile Semiconductor Memory Workshop, 2007 22nd IEEE, pages 3--4, 26-30 Aug. 2007.
[40]
A. Shah. PC World, February 2008. http://www.pcworld.com/article/id,142684--page,1/article.html.
[41]
http://www.supermicro.com/products/system/.
[42]
D. Woodhouse. Jffs2: The journalling flash file system, version 2. http://sources.redhat.com/jffs2/.

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Published In

cover image ACM Conferences
ASPLOS XIV: Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
March 2009
358 pages
ISBN:9781605584065
DOI:10.1145/1508244
  • cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 37, Issue 1
    ASPLOS 2009
    March 2009
    346 pages
    ISSN:0163-5964
    DOI:10.1145/2528521
    Issue’s Table of Contents
  • cover image ACM SIGPLAN Notices
    ACM SIGPLAN Notices  Volume 44, Issue 3
    ASPLOS 2009
    March 2009
    346 pages
    ISSN:0362-1340
    EISSN:1558-1160
    DOI:10.1145/1508284
    Issue’s Table of Contents
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Published: 07 March 2009

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Author Tags

  1. cluster architecture
  2. data centric
  3. flash memory
  4. solid-state storage

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Cited By

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  • (2023)G10: Enabling An Efficient Unified GPU Memory and Storage Architecture with Smart Tensor MigrationsProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614309(395-410)Online publication date: 28-Oct-2023
  • (2023)LEED: A Low-Power, Fast Persistent Key-Value Store on SmartNIC JBOFsProceedings of the ACM SIGCOMM 2023 Conference10.1145/3603269.3604880(1012-1027)Online publication date: 10-Sep-2023
  • (2023)Extending and Programming the NVMe I/O Determinism Interface for Flash ArraysACM Transactions on Storage10.1145/356842719:1(1-33)Online publication date: 11-Jan-2023
  • (2022)WAFLASH: Taming Unaligned Writes in Solid-State Disks2022 IEEE International Conference on Networking, Architecture and Storage (NAS)10.1109/NAS55553.2022.9925375(1-8)Online publication date: Oct-2022
  • (2021)IODAProceedings of the ACM SIGOPS 28th Symposium on Operating Systems Principles10.1145/3477132.3483573(263-279)Online publication date: 26-Oct-2021
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  • (2020)Design of a Host Interface Logic for GC-Free SSDsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.291903539:8(1674-1687)Online publication date: Aug-2020
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