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Slicing floorplans with range constraint

Published: 01 November 2006 Publication History

Abstract

In floorplanning, it is important to allow users to specify placement constraints. Floorplanning with preplaced constraint was considered recently in Murata et al. (1997) and Young and Wong (1998). In this paper, we address a more general kind of placement constraint called range constraint in which a module must be placed within a given rectangular region in the floorplan. This is a more general formulation of the placement constraint problem and any preplaced constraint can be written as a range constraint. We extend the Wong-Liu algorithm (1986) to handle range constraint. Our main contribution is a novel shape curve computation which takes range constraint into consideration. Experimental results show that the extended floorplanner performs very well and, in particular, it out-performs the floorplanner proposed by Young and Wong (1998) when specialized to handle preplaced modules

Cited By

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  • (2016)QB-treesProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2898074(1-6)Online publication date: 5-Jun-2016
  • (2016)Adaptive router node placement with gateway positions and QoS constraints in dynamic wireless mesh networksJournal of Network and Computer Applications10.1016/j.jnca.2016.05.00574:C(149-164)Online publication date: 1-Oct-2016
  • (2015)A Novel Analog Physical Synthesis Methodology Integrating Existent Design ExpertiseIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2014.237963034:2(199-212)Online publication date: 16-Jan-2015
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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 19, Issue 2
November 2006
107 pages

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IEEE Press

Publication History

Published: 01 November 2006

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Cited By

View all
  • (2016)QB-treesProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2898074(1-6)Online publication date: 5-Jun-2016
  • (2016)Adaptive router node placement with gateway positions and QoS constraints in dynamic wireless mesh networksJournal of Network and Computer Applications10.1016/j.jnca.2016.05.00574:C(149-164)Online publication date: 1-Oct-2016
  • (2015)A Novel Analog Physical Synthesis Methodology Integrating Existent Design ExpertiseIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2014.237963034:2(199-212)Online publication date: 16-Jan-2015
  • (2012)Performance-driven analog placement considering monotonic current pathsProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429516(613-619)Online publication date: 5-Nov-2012
  • (2011)Efficient package pin-out planning with system interconnects optimization for package-board codesignIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2010.204156219:5(904-909)Online publication date: 1-May-2011
  • (2008)Multi-bend bus driven floorplanningIntegration, the VLSI Journal10.1016/j.vlsi.2007.09.00241:2(306-316)Online publication date: 1-Feb-2008
  • (2005)Floorplanning for 3-D VLSI designProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1120899(405-411)Online publication date: 18-Jan-2005

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