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Algorithms for optimizing, two-dimensional symbolic layout compaction

Published: 01 November 2006 Publication History

Abstract

A set of algorithms that implement a technique called Supercompaction is described for two-dimensional compaction layouts. The algorithms minimize a one-dimensional objective function (pitch) by moving objects in the layout in two dimensions. The objective function can be monotonically reduced to a locally minimal value, greatly simplifying search. The algorithms can change the layout by simple motion of components or by automatic jog introduction. Experiments shows that: (1) the number of iterations required to reach a locally optimal layout is very small; (2) the time per iteration is competitive with other compaction techniques; (3) supercompacted layouts are smaller in pitch and area than those produced by existing one-dimensional algorithms; and (4) the results of supercompaction are more predictable than those of existing one-dimensional methods

Cited By

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  • (1993)A bounded 2D contour searching algorithm for floorplan design with arbitrarily shaped rectilinear and soft modulesProceedings of the 30th international Design Automation Conference10.1145/157485.165014(525-530)Online publication date: 1-Jul-1993
  • (1990)An efficient two-dimensional compaction algorithm for VLSI symbolic layoutProceedings of the conference on European design automation10.5555/949970.950014(196-200)Online publication date: 12-Mar-1990

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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 7, Issue 4
November 2006
106 pages

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IEEE Press

Publication History

Published: 01 November 2006

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Cited By

View all
  • (1993)A bounded 2D contour searching algorithm for floorplan design with arbitrarily shaped rectilinear and soft modulesProceedings of the 30th international Design Automation Conference10.1145/157485.165014(525-530)Online publication date: 1-Jul-1993
  • (1990)An efficient two-dimensional compaction algorithm for VLSI symbolic layoutProceedings of the conference on European design automation10.5555/949970.950014(196-200)Online publication date: 12-Mar-1990

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