research-article

Energy-efficient hardware data prefetching

Authors:

Pritish Narayanan,

Mahmoud Abdullah Bennaser,

Saurabh Chheda,

Csaba Andras MoritzAuthors Info & Claims

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 19, Issue 2

Pages 250 - 263

https://doi.org/10.1109/TVLSI.2009.2032916

Published: 01 February 2011 Publication History

Abstract

Extensive research has been done in prefetching techniques that hide memory latency in microprocessors leading to performance improvements. However, the energy aspect of prefetching is relatively unknown. While aggressive prefetching techniques often help to improve performance, they increase energy consumption by as much as 30% in the memory system. This paper provides a detailed evaluation on the energy impact of hardware data prefetching and then presents a set of new energy-aware techniques to overcome prefetching energy overhead of such schemes. These include compiler-assisted and hardware-based energy-aware techniques and a new power-aware prefetch engine that can reduce hardware prefetching related energy consumption by 7-11×. Combined with the effect of leakage energy reduction due to performance improvement, the total energy consumption for the memory system after the application of these techniques can be up to 12% less than the baseline with no prefetching.

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Cited By

Neves NTomás PRoma N(2021)Compiler-Assisted Data Streaming for Regular Code StructuresIEEE Transactions on Computers10.1109/TC.2020.299030270:3(483-494)Online publication date: 1-Mar-2021
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Domingos JNeves NRoma NTomás PMartínez JDuato JJohn L(2021)Unlimited vector extension with data streaming supportProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00025(209-222)Online publication date: 14-Jun-2021
https://dl.acm.org/doi/10.1109/ISCA52012.2021.00025
Lopes GFernandes JPaquete L(2019)An Empirical Study on the Energy Efficiency of Matrix Transposition AlgorithmsComposability, Comprehensibility and Correctness of Working Software10.1007/978-3-031-42833-3_11(375-391)Online publication date: 17-Jun-2019
https://dl.acm.org/doi/10.1007/978-3-031-42833-3_11
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Energy-efficient hardware data prefetching
1. General and reference
  1. Cross-computing tools and techniques
2. Hardware
  1. Integrated circuits
    1. Semiconductor memory

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Published In

cover image IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 19, Issue 2

February 2011

174 pages

ISSN:1063-8210

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Copyright © 2011.

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IEEE Educational Activities Department

United States

Publication History

Published: 01 February 2011

Revised: 02 April 2009

Received: 16 July 2008

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Cited By

Neves NTomás PRoma N(2021)Compiler-Assisted Data Streaming for Regular Code StructuresIEEE Transactions on Computers10.1109/TC.2020.299030270:3(483-494)Online publication date: 1-Mar-2021
https://dl.acm.org/doi/10.1109/TC.2020.2990302
Domingos JNeves NRoma NTomás PMartínez JDuato JJohn L(2021)Unlimited vector extension with data streaming supportProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00025(209-222)Online publication date: 14-Jun-2021
https://dl.acm.org/doi/10.1109/ISCA52012.2021.00025
Lopes GFernandes JPaquete L(2019)An Empirical Study on the Energy Efficiency of Matrix Transposition AlgorithmsComposability, Comprehensibility and Correctness of Working Software10.1007/978-3-031-42833-3_11(375-391)Online publication date: 17-Jun-2019
https://dl.acm.org/doi/10.1007/978-3-031-42833-3_11
Kulkarni AChakraborty SMahajan SKapoor HChen DHomayoun HTaskin B(2018)Utility Aware Snoozy Caches for Energy Efficient Chip Multi-ProcessorsProceedings of the 2018 Great Lakes Symposium on VLSI10.1145/3194554.3194581(249-254)Online publication date: 30-May-2018
https://dl.acm.org/doi/10.1145/3194554.3194581
Neves NTomás PRoma N(2017)Adaptive In-Cache Streaming for Efficient Data ManagementIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.267140525:7(2130-2143)Online publication date: 1-Jul-2017
https://dl.acm.org/doi/10.1109/TVLSI.2017.2671405
Garcia VRico AVillavieja CCarpenter PNavarro NRamirez A(2017)Adaptive Runtime-Assisted Block Prefetching on Chip-MultiprocessorsInternational Journal of Parallel Programming10.1007/s10766-016-0431-845:3(530-550)Online publication date: 1-Jun-2017
https://dl.acm.org/doi/10.1007/s10766-016-0431-8
Mittal S(2016)A Survey of Recent Prefetching Techniques for Processor CachesACM Computing Surveys10.1145/290707149:2(1-35)Online publication date: 2-Aug-2016
https://dl.acm.org/doi/10.1145/2907071
Nijim MQin XQiu MLi K(2013)An adaptive energy-conserving strategy for parallel disk systemsFuture Generation Computer Systems10.1016/j.future.2012.05.00329:1(196-207)Online publication date: 1-Jan-2013
https://dl.acm.org/doi/10.1016/j.future.2012.05.003
Dang XWang XTong DLu JYi JWang KRosenstiel WMacii E(2012)S/DCProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2492825(461-466)Online publication date: 12-Mar-2012
https://dl.acm.org/doi/10.5555/2492708.2492825
Lee YKim SAtienza DXie YAyala JStevens K(2011)DRAM energy reduction by prefetching-based memory traffic clusteringProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973031(103-108)Online publication date: 2-May-2011
https://dl.acm.org/doi/10.1145/1973009.1973031

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