Nothing Special   »   [go: up one dir, main page]

skip to main content
research-article

BDS: a BDD-based logic optimization system

Published: 01 November 2006 Publication History

Abstract

This paper describes a novel logic decomposition theory and a practical logic synthesis system, BDS. It is based on a new binary decision diagrams (BDD) decomposition technique which supports all types of decomposition structures, including AND, OR, XOR, and complex MUX, both algebraic and Boolean. As a result, the method is very efficient in synthesizing both AND/OR and XOR-intensive functions. It also has a capability to handle very large circuits, as it employs the BDD decomposition in the partitioned Boolean network environment. The experimental results show that BDD-based logic decomposition is a promising alternative to the existing logic optimization approaches. In particular, it offers a superior runtime advantage over traditional logic synthesis systems

Cited By

View all
  • (2023)Experimental Study of Algorithms for Minimization of Binary Decision Diagrams Using Algebraic Representations of CofactorsProgramming and Computing Software10.1134/S036176882304003549:4(268-285)Online publication date: 1-Aug-2023
  • (2023)Hardware Implementation of Code Converters Designed to Reduce the Length of Binary Encoded WordsProgramming and Computing Software10.1134/S036176882304002349:4(247-267)Online publication date: 1-Aug-2023
  • (2023)Semi‐tensor product‐based algebra‐logic mixed representation and fault diagnosis for a class of gate networksAsian Journal of Control10.1002/asjc.308325:5(3870-3885)Online publication date: 4-Sep-2023
  • Show More Cited By
  1. BDS: a BDD-based logic optimization system

    Recommendations

    Comments

    Please enable JavaScript to view thecomments powered by Disqus.

    Information & Contributors

    Information

    Published In

    cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 21, Issue 7
    November 2006
    130 pages

    Publisher

    IEEE Press

    Publication History

    Published: 01 November 2006

    Qualifiers

    • Research-article

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)0
    • Downloads (Last 6 weeks)0
    Reflects downloads up to 23 Feb 2025

    Other Metrics

    Citations

    Cited By

    View all
    • (2023)Experimental Study of Algorithms for Minimization of Binary Decision Diagrams Using Algebraic Representations of CofactorsProgramming and Computing Software10.1134/S036176882304003549:4(268-285)Online publication date: 1-Aug-2023
    • (2023)Hardware Implementation of Code Converters Designed to Reduce the Length of Binary Encoded WordsProgramming and Computing Software10.1134/S036176882304002349:4(247-267)Online publication date: 1-Aug-2023
    • (2023)Semi‐tensor product‐based algebra‐logic mixed representation and fault diagnosis for a class of gate networksAsian Journal of Control10.1002/asjc.308325:5(3870-3885)Online publication date: 4-Sep-2023
    • (2020)A scalable mixed synthesis framework for heterogeneous networksProceedings of the 23rd Conference on Design, Automation and Test in Europe10.5555/3408352.3408505(670-673)Online publication date: 9-Mar-2020
    • (2020)Dynamic minimization of bi-kronecker functional decision diagramsProceedings of the 39th International Conference on Computer-Aided Design10.1145/3400302.3415618(1-9)Online publication date: 2-Nov-2020
    • (2020)Advanced Functional Decomposition Using Majority and Its ApplicationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.292539239:8(1621-1634)Online publication date: 1-Aug-2020
    • (2019)Decomposing a System of Boolean Functions into Subsystems of Connected FunctionsJournal of Computer and Systems Sciences International10.1134/S106423071902005958:2(167-182)Online publication date: 1-Mar-2019
    • (2018)Synthesis of circuits based on all-optical Mach-Zehnder Interferometers using Binary Decision DiagramsMicroelectronics Journal10.1016/j.mejo.2017.11.00871:C(19-29)Online publication date: 1-Jan-2018
    • (2017)A Novel Graphical Technique for Combinational Logic Representation and OptimizationComplexity10.1155/2017/96963422017Online publication date: 31-Dec-2017
    • (2017)Logic synthesis for FPGAs based on cutting of BDDMicroprocessors & Microsystems10.1016/j.micpro.2017.06.01052:C(173-187)Online publication date: 1-Jul-2017
    • Show More Cited By

    View Options

    View options

    Figures

    Tables

    Media

    Share

    Share

    Share this Publication link

    Share on social media