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Rate 1/2 and 2/3 Majority Logic Decodable Binary Burst Error-Correcting Codes

Published: 01 February 1987 Publication History

Abstract

A new design procedure is described for constructing rate 1/2 and rate 2/3 majority logical decodable burst error-correcting codes. The rate 1/2 codes are closely related to the codes of Srinivasan [1].

Reference

[1]
C. V. Srinivasan, "Codes for error correction in high-speed memory systems--Part I: Correction of cell defects in integrated memories." IEEE Trans. Comput., vol. C-20, pp. 882-888, Aug. 1971.

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Published In

cover image IEEE Transactions on Computers
IEEE Transactions on Computers  Volume 36, Issue 2
February 1987
135 pages

Publisher

IEEE Computer Society

United States

Publication History

Published: 01 February 1987

Author Tags

  1. Burst error codes
  2. ECC codes
  3. VLSI
  4. coding
  5. decoding
  6. error control
  7. fault tolerance
  8. majority logic codes

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