A Hybrid Modeling Approach to Microarchitecture Design Space Exploring

The micro architectural design space of a new processor is too huge for architects to handle with cycle-accurate simulators. Previous researches attack this problem by statistical learning methods such as Artificial Neural Networks (ANN) and statistical sampling solutions such as SimPoint. These approaches greatly reduce the simulation time while keeping the results of CPI precisely. However, all these machine learning and sampling methods are “black boxes”: although we can get CPI accurately, we can’t get detailed information of on-chip components which makes it difficult to find relationships between these components and bottlenecks of a design. Thus these approaches are not sufficient to provide enough intuitions for architects to find potential improvements. This paper proposes a novel “white box” Decision-free Generalized Stochastic Petri Nets (Decision-free GSPN) model. We adopt ANN to estimate certain parameters for GSPN when we consider new design points. Our hybrid approach could predict CPI accurately and produce the usage state of instruction queue (IQ), micro operation queue (uopQ), reservation station (RS), reorder buffer (ROB) and so on precise enough to give architects intuitions into the new design. Our solution takes only several minutes to finish comparing to days when we adopt cycle-accurate software simulator, with less than 8.6% error rate for CPI. We believe the information our method produces is precise enough to give architects more intuitions and insights about how to change a design comparing to previous machine learning methods.