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10.1109/DCC.2007.10guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
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Algorithms and Hardware Structures for Unobtrusive Real-Time Compression of Instruction and Data Address Traces

Published: 27 March 2007 Publication History

Abstract

Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software developers for program optimization, performance tuning, and debugging. Such traces are typically very large and need to be compressed to reduce the storage, processing, and communication bandwidth requirements. However, preexisting general-purpose and trace-specific compression algorithms are designed for software implementation and are not suitable for runtime compression. Compressing program execution traces at runtime in hardware can deliver insights into the behavior of the system under test without any negative interference with normal program execution. Traditional debugging tools, on the other hand, have to stop the program frequently to examine the state of the processor. Moreover, software developers often do not have access to the entire history of computation that led to an erroneous state. In addition, stepping through a program is a tedious task and may interact with other system components in such a way that the original errors disappear, thus preventing any useful insight. The need for unobtrusive tracing is further underscored by the development of computer systems that feature multiple processing cores on a single chip. In this paper, we introduce a set of algorithms for compressing instruction and data address traces that can easily be implemented in an on-chip trace compression module and describe the corresponding hardware structures. The proposed algorithms are analytically and experimentally evaluated. Our results show that very small hardware structures suffice to achieve a compression ratio similar to that of a software implementation of gzip while being orders of magnitude faster. A hardware structure with slightly over 2 KB of state achieves a compression ratio of 125.9 for instruction address traces, whereas gzip achieves a compression ratio of 87.4. For data address traces, a hardware structure with 5 KB of state achieves a compression ratio of 6.1, compared to 6.8 achieved by gzip.

Cited By

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  • (2015)ITFCompProceedings of the 8th International Conference on Simulation Tools and Techniques10.4108/eai.24-8-2015.2260596(200-207)Online publication date: 24-Aug-2015
  • (2015)Architecture-Aware Real-Time Compression of Execution TracesACM Transactions on Embedded Computing Systems10.1145/276644914:4(1-24)Online publication date: 9-Sep-2015
  • (2011)Real-time address trace compression for emulated and real system-on-chip processor core debuggingProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973075(331-336)Online publication date: 2-May-2011
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Published In

cover image Guide Proceedings
DCC '07: Proceedings of the 2007 Data Compression Conference
March 2007
372 pages
ISBN:0769527914

Publisher

IEEE Computer Society

United States

Publication History

Published: 27 March 2007

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View all
  • (2015)ITFCompProceedings of the 8th International Conference on Simulation Tools and Techniques10.4108/eai.24-8-2015.2260596(200-207)Online publication date: 24-Aug-2015
  • (2015)Architecture-Aware Real-Time Compression of Execution TracesACM Transactions on Embedded Computing Systems10.1145/276644914:4(1-24)Online publication date: 9-Sep-2015
  • (2011)Real-time address trace compression for emulated and real system-on-chip processor core debuggingProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973075(331-336)Online publication date: 2-May-2011
  • (2010)Hardware-based data value and address trace filtering techniquesProceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems10.1145/1878921.1878940(117-126)Online publication date: 24-Oct-2010
  • (2009)A real-time program trace compressor utilizing double move-to-front methodProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630102(738-743)Online publication date: 26-Jul-2009

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