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Accelerating Galois Field Arithmetic for Reed-Solomon Erasure Codes in Storage Applications

Published: 26 September 2011 Publication History

Abstract

Galois fields (also called finite fields) play an essential role in the areas of cryptography and coding theory. They are the foundation of various error- and erasure-correcting codes and therefore central to the design of reliable storage systems. The efficiency and performance of these systems depend considerably on the implementation of Galois field arithmetic, in particular on the implementation of the multiplication. In current software implementations multiplication is typically performed by using pre-calculated lookup tables for the logarithm and its inverse or even for the full multiplication result. However, today the memory subsystem has become one of the main bottlenecks in commodity systems and relying on large in-memory data structures accessed from inner loop code can severely impact the overall performance and deteriorate scalability. In this paper, we study the execution of Galois field multiplication on modern processor architectures without using lookup tables. Instead we propose to trade computation for memory references and, therefore, to perform full polynomial multiplication with modular reduction using the generator polynomial of the Galois field. We present a SIMDized (vectorized) implementation of the polynomial multiplication algorithm in GF(2 16) and show the performance on commodity processors and on GPGPU accelerators.

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  1. Accelerating Galois Field Arithmetic for Reed-Solomon Erasure Codes in Storage Applications

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    cover image Guide Proceedings
    CLUSTER '11: Proceedings of the 2011 IEEE International Conference on Cluster Computing
    September 2011
    613 pages
    ISBN:9780769545165

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    IEEE Computer Society

    United States

    Publication History

    Published: 26 September 2011

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    • (2022)DSPRJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2022.102441125:COnline publication date: 1-Apr-2022
    • (2020)A Generic FPGA Accelerator for Minimum Storage Regenerating CodesProceedings of the 25th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC47756.2020.9045125(271-276)Online publication date: 17-Jan-2020
    • (2017)High-Performance General Functional Regenerating Codes with Near-Optimal Repair BandwidthACM Transactions on Storage10.1145/305112213:2(1-28)Online publication date: 10-Jun-2017
    • (2016)Fast Multiplication in Binary Fields on GPUs via Register CacheProceedings of the 2016 International Conference on Supercomputing10.1145/2925426.2926259(1-12)Online publication date: 1-Jun-2016
    • (2013)Screaming fast Galois field arithmetic using intel SIMD instructionsProceedings of the 11th USENIX conference on File and Storage Technologies10.5555/2591272.2591303(299-306)Online publication date: 12-Feb-2013
    • (2013)Speeding Up Galois Field Arithmetic on Intel MIC ArchitectureProceedings of the 10th IFIP International Conference on Network and Parallel Computing - Volume 814710.1007/978-3-642-40820-5_13(143-154)Online publication date: 19-Sep-2013

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