research-article

Thermal resistance modeling in FDSOI transistors with industry standard model BSIM-IMG

Authors:

Pragya Kushwaha,

K. Bala Krishna,

Harshit Agarwal,

Sourabh Khandelwal,

Juan-Pablo Duarte,

Yogesh Singh ChauhanAuthors Info & Claims

Microelectronics Journal, Volume 56, Issue C

Pages 171 - 176

https://doi.org/10.1016/j.mejo.2016.07.014

Published: 01 October 2016 Publication History

Abstract

The channel in Fully Depleted Silicon On Insulator (FDSOI) transistors is completely isolated from the substrate via buried oxide (BOX) and from the sides by shallow trench isolations, which results in high thermal resistance (Rth). Further, Rth increases with reduction in channel length (Lg). In this paper, we have proposed a compact model for the geometry and temperature dependence of Rth in FDSOI transistors. The model is validated against experimental and Technology Computer Aided Design (TCAD) data. The proposed model is implemented in the independent multi-gate model (BSIM-IMG) for FDSOI transistors. Graphical abstractThe channel in Fully Depleted Silicon On Insulator (FDSOI) transistors is completely isolated from the substrate via buried oxide (BOX) and from the sides by shallow trench isolations, which results in high thermal resistance (Rth). Further, Rth increases with reduction in channel length (Lg). In this paper, we have proposed a compact model for the geometry and temperature dependence of Rth in FDSOI transistors. The model is validated against experimental and Technology Computer Aided Design (TCAD) data. We also validate the radio-frequency (RF) model with measured high frequency data. The proposed model is implemented in the independent multigate model (BSIM-IMG) for FDSOI transistors.Display Omitted HighlightsGeometrical scaling of thermal resistance in FDSOI transistor has been analyzed.A new behavioral model for thermal resistance scaling has been proposed.The model is validated against experimental and Technology Computer Aided Design (TCAD) data.The BSIM-IMG model is validated on the measured RF characteristics for wide bias and frequency ranges.

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Cited By

Motamedi AOrouji AMadadi D(2022)Physical analysis of β-Ga2O3 gate-all-around nanowire junctionless transistors: short-channel effects and temperature dependenceJournal of Computational Electronics10.1007/s10825-021-01837-x21:1(197-205)Online publication date: 28-Jan-2022
https://dl.acm.org/doi/10.1007/s10825-021-01837-x

Thermal resistance modeling in FDSOI transistors with industry standard model BSIM-IMG
1. Hardware
2. Networks
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Published In

cover image Microelectronics Journal

Microelectronics Journal Volume 56, Issue C

October 2016

177 pages

ISSN:0026-2692

Issue’s Table of Contents

Copyright © Elsevier Ltd.

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Elsevier Science Publishers B. V.

Netherlands

Publication History

Published: 01 October 2016

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Cited By

Motamedi AOrouji AMadadi D(2022)Physical analysis of β-Ga2O3 gate-all-around nanowire junctionless transistors: short-channel effects and temperature dependenceJournal of Computational Electronics10.1007/s10825-021-01837-x21:1(197-205)Online publication date: 28-Jan-2022
https://dl.acm.org/doi/10.1007/s10825-021-01837-x

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